xor_2.bdf

来自「基于Quartus II FPGA/CPLD数字系统设计实例（VHDL源代码文件」· BDF 代码 · 共 124 行

/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/
/*
Copyright (C) 1991-2006 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/
(header "graphic" (version "1.3"))
(pin
	(input)
	(rect 32 136 200 152)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "a" (rect 5 0 10 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 92 12)(pt 117 12)(line_width 1))
		(line (pt 92 4)(pt 117 4)(line_width 1))
		(line (pt 121 8)(pt 168 8)(line_width 1))
		(line (pt 92 12)(pt 92 4)(line_width 1))
		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
	)
	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
	(input)
	(rect 32 176 200 192)
	(text "INPUT" (rect 133 0 161 10)(font "Arial" (font_size 6)))
	(text "b" (rect 5 0 10 12)(font "Arial" ))
	(pt 168 8)
	(drawing
		(line (pt 92 12)(pt 117 12)(line_width 1))
		(line (pt 92 4)(pt 117 4)(line_width 1))
		(line (pt 121 8)(pt 168 8)(line_width 1))
		(line (pt 92 12)(pt 92 4)(line_width 1))
		(line (pt 117 4)(pt 121 8)(line_width 1))
		(line (pt 117 12)(pt 121 8)(line_width 1))
	)
	(text "VCC" (rect 136 7 156 17)(font "Arial" (font_size 6)))
)
(pin
	(output)
	(rect 352 144 528 160)
	(text "OUTPUT" (rect 1 0 39 10)(font "Arial" (font_size 6)))
	(text "y" (rect 90 0 97 12)(font "Arial" ))
	(pt 0 8)
	(drawing
		(line (pt 0 8)(pt 52 8)(line_width 1))
		(line (pt 52 4)(pt 78 4)(line_width 1))
		(line (pt 52 12)(pt 78 12)(line_width 1))
		(line (pt 52 12)(pt 52 4)(line_width 1))
		(line (pt 78 4)(pt 82 8)(line_width 1))
		(line (pt 82 8)(pt 78 12)(line_width 1))
		(line (pt 78 12)(pt 82 8)(line_width 1))
	)
)
(symbol
	(rect 240 128 304 176)
	(text "XOR" (rect 1 0 21 10)(font "Arial" (font_size 6)))
	(text "inst" (rect 3 37 20 49)(font "Arial" ))
	(port
		(pt 0 16)
		(input)
		(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
		(text "IN1" (rect 2 7 19 19)(font "Courier New" (bold))(invisible))
		(line (pt 0 16)(pt 11 16)(line_width 1))
	)
	(port
		(pt 0 32)
		(input)
		(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
		(text "IN2" (rect 2 23 19 35)(font "Courier New" (bold))(invisible))
		(line (pt 0 32)(pt 11 32)(line_width 1))
	)
	(port
		(pt 64 24)
		(output)
		(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
		(text "OUT" (rect 48 15 65 27)(font "Courier New" (bold))(invisible))
		(line (pt 49 24)(pt 64 24)(line_width 1))
	)
	(drawing
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		(line (pt 14 36)(pt 25 36)(line_width 1))
		(arc (pt 7 29)(pt 7 19)(rect -14 8 19 41)(line_width 1))
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		(arc (pt 25 35)(pt 49 24)(rect -6 -27 57 36)(line_width 1))
		(arc (pt 8 36)(pt 8 12)(rect -21 7 14 42)(line_width 1))
	)
)
(connector
	(pt 200 144)
	(pt 240 144)
)
(connector
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	(pt 224 160)
)
(connector
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	(pt 200 184)
)
(connector
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)
(connector
	(pt 304 152)
	(pt 352 152)
)