seg.map.rpt

自己做的开发板

; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in E:/CPLD/seg/seg.map.eqn.


+--------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis Source Files Read                                                                                   ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; File Name with User-Entered Path ; Used in Netlist ; File Name with Absolute Path                                        ;
+----------------------------------+-----------------+---------------------------------------------------------------------+
; seg.vhd                          ; yes             ; E:/CPLD/seg/seg.vhd                                                 ;
; lpm_counter.tdf                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf         ;
; lpm_constant.inc                 ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_constant.inc        ;
; lpm_decode.inc                   ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_decode.inc          ;
; lpm_add_sub.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.inc         ;
; cmpconst.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/cmpconst.inc            ;
; lpm_compare.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_compare.inc         ;
; lpm_counter.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_counter.inc         ;
; dffeea.inc                       ; yes             ; c:/altera/quartus42/libraries/megafunctions/dffeea.inc              ;
; alt_synch_counter.inc            ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_synch_counter.inc   ;
; alt_synch_counter_f.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_synch_counter_f.inc ;
; alt_counter_f10ke.inc            ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_counter_f10ke.inc   ;
; alt_counter_stratix.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_counter_stratix.inc ;
; aglobal42.inc                    ; yes             ; c:/altera/quartus42/libraries/megafunctions/aglobal42.inc           ;
; lpm_add_sub.tdf                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf         ;
; addcore.inc                      ; yes             ; c:/altera/quartus42/libraries/megafunctions/addcore.inc             ;
; look_add.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/look_add.inc            ;
; bypassff.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/bypassff.inc            ;
; altshift.inc                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/altshift.inc            ;
; alt_stratix_add_sub.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_stratix_add_sub.inc ;
; alt_mercury_add_sub.inc          ; yes             ; c:/altera/quartus42/libraries/megafunctions/alt_mercury_add_sub.inc ;
; addcore.tdf                      ; yes             ; c:/altera/quartus42/libraries/megafunctions/addcore.tdf             ;
; a_csnbuffer.inc                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/a_csnbuffer.inc         ;
; a_csnbuffer.tdf                  ; yes             ; c:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf         ;
; look_add.tdf                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/look_add.tdf            ;
; altshift.tdf                     ; yes             ; c:/altera/quartus42/libraries/megafunctions/altshift.tdf            ;
+----------------------------------+-----------------+---------------------------------------------------------------------+


+---------------------------------------------+
; Analysis & Synthesis Resource Usage Summary ;
+----------------------+----------------------+
; Resource             ; Usage                ;
+----------------------+----------------------+
; Logic cells          ; 54                   ;
; Total registers      ; 34                   ;
; I/O pins             ; 29                   ;
; Shareable expanders  ; 26                   ;
; Maximum fan-out node ; Num[0]               ;
; Maximum fan-out      ; 46                   ;
; Total fan-out        ; 1049                 ;
; Average fan-out      ; 9.62                 ;
+----------------------+----------------------+


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 4.2 Build 157 12/07/2004 SJ Full Version
    Info: Processing started: Fri May 23 09:59:11 2008
Info: Command: quartus_map --import_settings_files=on --export_settings_files=off seg -c seg
Info: Found 2 design units, including 1 entities, in source file seg.vhd
    Info: Found design unit 1: seg-bin27seg_arch
    Info: Found entity 1: seg
Info: Power-up level of register "clk[7]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[7]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[6]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[6]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[5]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[5]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[4]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[4]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[3]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[3]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[2]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[2]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[1]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[1]" with stuck data_in port to stuck value VCC
Info: Power-up level of register "clk[0]" is not specified -- using power-up level of High to minimize register
Warning: Reduced register "clk[0]" with stuck data_in port to stuck value VCC
Info: Inferred 1 megafunctions from design logic
    Info: Inferred lpm_counter megafunction (LPM_WIDTH=5) from the following logic: "cnt4[0]~10"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/lpm_counter.tdf
    Info: Found entity 1: lpm_counter
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/look_add.tdf
    Info: Found entity 1: look_add
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus42/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Ignored 21 buffer(s)
    Info: Ignored 21 SOFT buffer(s)
Warning: Output pins are stuck at VCC or GND
    Warning: Pin "pin5[11]" stuck at GND
    Warning: Pin "pin5[10]" stuck at GND
    Warning: Pin "pin5[9]" stuck at GND
    Warning: Pin "pin5[8]" stuck at GND
    Warning: Pin "pin5[7]" stuck at GND
    Warning: Pin "pin5[6]" stuck at GND
    Warning: Pin "pin5[5]" stuck at GND
    Warning: Pin "pin5[4]" stuck at GND
    Warning: Pin "pin5[3]" stuck at GND
    Warning: Pin "pin5[2]" stuck at GND
    Warning: Pin "pin5[1]" stuck at GND
    Warning: Pin "pin5[0]" stuck at GND
    Warning: Pin "data_clk[7]" stuck at VCC
    Warning: Pin "data_clk[6]" stuck at VCC
    Warning: Pin "data_clk[5]" stuck at VCC
    Warning: Pin "data_clk[4]" stuck at VCC
    Warning: Pin "data_clk[3]" stuck at VCC
    Warning: Pin "data_clk[2]" stuck at VCC
    Warning: Pin "data_clk[1]" stuck at VCC
    Warning: Pin "data_clk[0]" stuck at VCC
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "clock" to global clock signal
Info: Promoted pin-driven signal(s) to global signal
    Info: Promoted clock signal driven by pin "clock" to global clock signal
Info: Implemented 109 device resources after synthesis - the final resource count might be different
    Info: Implemented 1 input pins
    Info: Implemented 28 output pins
    Info: Implemented 54 macrocells
    Info: Implemented 26 shareable expanders
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 29 warnings
    Info: Processing ended: Fri May 23 09:59:19 2008
    Info: Elapsed time: 00:00:09