pll2.tan.qmsg

PLL 时钟模块 Quartus II平台的简单设计实例 附仿真波形

{ "Info" "ITAN_NO_REG2REG_EXIST" "altpll:altpll_component\|_clk0 " "Info: No valid register-to-register data paths exist for clock \"altpll:altpll_component\|_clk0\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "altpll:altpll_component\|_clk1 " "Info: No valid register-to-register data paths exist for clock \"altpll:altpll_component\|_clk1\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "altpll:altpll_component\|_clk2 " "Info: No valid register-to-register data paths exist for clock \"altpll:altpll_component\|_clk2\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "altpll:altpll_component\|_extclk0 " "Info: No valid register-to-register data paths exist for clock \"altpll:altpll_component\|_extclk0\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "altpll:altpll_component\|_extclk1 " "Info: No valid register-to-register data paths exist for clock \"altpll:altpll_component\|_extclk1\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}
{ "Info" "ITAN_NO_REG2REG_EXIST" "inclk0 " "Info: No valid register-to-register data paths exist for clock \"inclk0\"" {  } {  } 0 0 "No valid register-to-register data paths exist for clock \"%1!s!\"" 0 0}