ledwater.map.qmsg

流水灯 Verylog编写的 Quartus II平台的简单设计实例 附仿真波形

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue May 20 19:50:16 2008 " "Info: Processing started: Tue May 20 19:50:16 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off LEDWATER -c LEDWATER " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off LEDWATER -c LEDWATER" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "LEDWATER.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file LEDWATER.v" { { "Info" "ISGN_ENTITY_NAME" "1 LEDWATER " "Info: Found entity 1: LEDWATER" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 2 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "LEDWATER " "Info: Elaborating entity \"LEDWATER\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "IOPT_MLS_DUP_REG_INFO_HDR" "" "Info: Duplicate registers merged to single register" { { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[1\] LREGN\[1\] " "Info: Duplicate register \"LREG\[1\]\" merged to single register \"LREGN\[1\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[2\] LREGN\[2\] " "Info: Duplicate register \"LREG\[2\]\" merged to single register \"LREGN\[2\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[3\] LREGN\[3\] " "Info: Duplicate register \"LREG\[3\]\" merged to single register \"LREGN\[3\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[4\] LREGN\[4\] " "Info: Duplicate register \"LREG\[4\]\" merged to single register \"LREGN\[4\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[5\] LREGN\[5\] " "Info: Duplicate register \"LREG\[5\]\" merged to single register \"LREGN\[5\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[6\] LREGN\[6\] " "Info: Duplicate register \"LREG\[6\]\" merged to single register \"LREGN\[6\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[7\] LREGN\[7\] " "Info: Duplicate register \"LREG\[7\]\" merged to single register \"LREGN\[7\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[8\] LREGN\[8\] " "Info: Duplicate register \"LREG\[8\]\" merged to single register \"LREGN\[8\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[9\] LREGN\[9\] " "Info: Duplicate register \"LREG\[9\]\" merged to single register \"LREGN\[9\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[10\] LREGN\[10\] " "Info: Duplicate register \"LREG\[10\]\" merged to single register \"LREGN\[10\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[11\] LREGN\[11\] " "Info: Duplicate register \"LREG\[11\]\" merged to single register \"LREGN\[11\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0} { "Info" "IOPT_MLS_DUP_REG_INFO_POWER_UP_CHANGE" "LREG\[12\] LREGN\[12\] " "Info: Duplicate register \"LREG\[12\]\" merged to single register \"LREGN\[12\]\", power-up level changed" {  } { { "LEDWATER.v" "" { Text "C:/altera/work/LEDWATER/LEDWATER.v" 12 -1 0 } }  } 0 0 "Duplicate register \"%1!s!\" merged to single register \"%2!s!\", power-up level changed" 0 0}  } {  } 0 0 "Duplicate registers merged to single register" 0 0}
{ "Info" "IMTM_MTM_PROMOTE_GLOBAL" "" "Info: Promoted pin-driven signal(s) to global signal" { { "Info" "IMTM_MTM_PROMOTE_GLOBAL_CLOCK" "CLK " "Info: Promoted clock signal driven by pin \"CLK\" to global clock signal" {  } {  } 0 0 "Promoted clock signal driven by pin \"%1!s!\" to global clock signal" 0 0}  } {  } 0 0 "Promoted pin-driven signal(s) to global signal" 0 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "25 " "Info: Implemented 25 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "1 " "Info: Implemented 1 input pins" {  } {  } 0 0 "Implemented %1!d! input pins" 0 0} { "Info" "ISCL_SCL_TM_OPINS" "12 " "Info: Implemented 12 output pins" {  } {  } 0 0 "Implemented %1!d! output pins" 0 0} { "Info" "ISCL_SCL_TM_MCELLS" "12 " "Info: Implemented 12 macrocells" {  } {  } 0 0 "Implemented %1!d! macrocells" 0 0}  } {  } 0 0 "Implemented %1!d! device resources after synthesis - the final resource count might be different" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s Quartus II " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue May 20 19:50:17 2008 " "Info: Processing ended: Tue May 20 19:50:17 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}