mp8086.tan.talkback.xml

X8086的VHDL源码

<!--
This XML file (created on Fri Jan 12 16:14:08 2007) contains limited information
from the compilation of logic designs using Quartus II software (BUT NOT THE
LOGIC DESIGN FILES) that will be transmitted to Altera Corporation through
operation of the "TalkBack" feature.  To enable/disable this feature, run
qtb_install.exe located in your quartus/bin folder.  For more information, go
to license.txt.
-->
<talkback>
<ver>6.0</ver>
<schema>quartus_version_6.0_build_178.xsd</schema>
<license>
	<host_id>0090cccb6bda</host_id>
	<nic_id>000e0c2c3096</nic_id>
	<cdrive_id>b4be55b0</cdrive_id>
</license>
<tool>
	<name>Quartus II</name>
	<version>6.0</version>
	<build>Build 178</build>
	<binary_type>32</binary_type>
	<module>quartus_tan</module>
	<edition>Full Version</edition>
	<eval>Licensed</eval>
	<compilation_end_time>Fri Jan 12 16:14:08 2007</compilation_end_time>
</tool>
<machine>
	<os>Windows XP</os>
	<cpu>
		<proc_count>2</proc_count>
		<cpu_freq units="MHz">2600</cpu_freq>
	</cpu>
	<ram units="MB">1015</ram>
</machine>
<project>C:/work/MP8086/MP8086</project>
<revision>MP8086</revision>
<compilation_summary>
	<flow_status>Successful - Fri Jan 12 16:14:07 2007</flow_status>
	<quartus_ii_version>6.0 Build 178 04/27/2006 SJ Full Version</quartus_ii_version>
	<revision_name>MP8086</revision_name>
	<top_level_entity_name>MP8086</top_level_entity_name>
	<family>APEX20KE</family>
	<device>EP20K400EBC652-3</device>
	<timing_models>Final</timing_models>
	<met_timing_requirements>Yes</met_timing_requirements>
	<total_logic_elements>5,721 / 16,640 ( 34 % )</total_logic_elements>
	<total_pins>426 / 488 ( 87 % )</total_pins>
	<total_virtual_pins>0</total_virtual_pins>
	<total_memory_bits>4,096 / 212,992 ( 2 % )</total_memory_bits>
	<total_plls>0</total_plls>
</compilation_summary>
<mep_data>
	<command_line>quartus_tan --read_settings_files=off --write_settings_files=off MP8086 -c MP8086</command_line>
</mep_data>
<software_data>
	<smart_recompile>off</smart_recompile>
</software_data>
<messages>
	<warning>Warning: Found pins functioning as undefined clocks and/or memory enables</warning>
	<info>Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning</info>
	<info>Info: Elapsed time: 00:00:49</info>
	<info>Info: Processing ended: Fri Jan 12 16:14:07 2007</info>
	<info>Info: th for register &quot;CUEU:T_CUEU_MP8086|EUC:EUC_CUEU|current_state[407]&quot; (data pin = &quot;I_RST&quot;, clock pin = &quot;I_CLK&quot;) is 0.417 ns</info>
	<info>Info: - Shortest pin to register delay is 3.814 ns</info>
</messages>
<clock_settings_summary>
	<row>
		<clock_node_name>I_CLK</clock_node_name>
		<type>User Pin</type>
		<fmax_requirement>None</fmax_requirement>
		<early_latency units="ns">0.000</early_latency>
		<late_latency units="ns">0.000</late_latency>
		<multiply_base_fmax_by>N/A</multiply_base_fmax_by>
		<divide_base_fmax_by>N/A</divide_base_fmax_by>
		<offset>N/A</offset>
	</row>
</clock_settings_summary>
<performance>
	<nonclk>
		<type>Worst-case tsu</type>
		<slack>N/A</slack>
		<required>None</required>
		<actual>10.984 ns</actual>
	</nonclk>
	<nonclk>
		<type>Worst-case tco</type>
		<slack>N/A</slack>
		<required>None</required>
		<actual>65.386 ns</actual>
	</nonclk>
	<nonclk>
		<type>Worst-case th</type>
		<slack>N/A</slack>
		<required>None</required>
		<actual>0.417 ns</actual>
	</nonclk>
	<clk>
		<name>I_CLK</name>
		<slack>N/A</slack>
		<required>None</required>
		<actual>9.13 MHz ( period = 109.548 ns )</actual>
	</clk>
</performance>
</talkback>