pcpu.fit.eqn

来自「可以实现CPU的VHDL源码」· EQN 代码 · 共 2,434 行 · 第 1/5 页

A1L665 = select_y[0] & A1L565 # !select_y[0] & gr[2][11] & select_y[1];


--A1L063 is i~483 at LC4_9_AK4
--operation mode is normal

A1L063 = select_y[2] & (A1L363 # select_y[3]) # !select_y[2] & !select_y[3] & A1L665;


--id_ir[11] is id_ir[11] at LC1_3_AK4
--operation mode is normal

id_ir[11]_lut_out = i_datain[11];
id_ir[11] = DFFE(id_ir[11]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_C1[11] is reg_C1[11] at LC7_8_AK4
--operation mode is normal

reg_C1[11]_lut_out = mem_ir[11] & reg_C[11] # !mem_ir[11] & (A1L785 & reg_C[11] # !A1L785 & d_datain[11]);
reg_C1[11] = DFFE(reg_C1[11]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--A1L765 is i~5965 at LC4_11_AI4
--operation mode is normal

A1L765 = id_ir[11] & (select_y[1] # reg_C1[11]) # !id_ir[11] & !select_y[1] & reg_C1[11];


--smdr[11] is smdr[11] at LC9_8_AI4
--operation mode is normal

smdr[11]_lut_out = A1L754 & (id_ir[10] # A1L795) # !A1L754 & !id_ir[10] & A1L795;
smdr[11] = DFFE(smdr[11]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L447);


--A1L865 is i~5966 at LC8_10_AI4
--operation mode is normal

A1L865 = select_y[0] & smdr[11] & !select_y[1] # !select_y[0] & A1L765;


--A1L163 is i~484 at LC4_8_AK4
--operation mode is normal

A1L163 = A1L063 & (A1L865 # !select_y[3]) # !A1L063 & A1L465 & select_y[3];


--reg_C[10] is reg_C[10] at LC8_8_AK4
--operation mode is normal

reg_C[10]_lut_out = F3_cs_buffer[10];
reg_C[10] = DFFE(reg_C[10]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_B[10] is reg_B[10] at LC10_16_AK4
--operation mode is normal

reg_B[10]_lut_out = A1L982 & (A1L762 # A1L652 & A1L305) # !A1L982 & A1L652 & A1L305;
reg_B[10] = DFFE(reg_B[10]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_A[10] is reg_A[10] at LC7_3_AF4
--operation mode is normal

reg_A[10]_lut_out = !A1L312;
reg_A[10] = DFFE(reg_A[10]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--A1L965 is i~5967 at LC2_16_AK4
--operation mode is normal

A1L965 = reg_B[10] & (select_y[0] # reg_A[10]) # !reg_B[10] & !select_y[0] & reg_A[10];


--A1L075 is i~5968 at LC3_15_AK4
--operation mode is normal

A1L075 = select_y[1] & reg_C[10] & select_y[0] # !select_y[1] & A1L965;


--gr[6][10] is gr[6][10] at LC8_8_AJ4
--operation mode is normal

gr[6][10]_lut_out = reg_C1[10];
gr[6][10] = DFFE(gr[6][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L461);


--gr[5][10] is gr[5][10] at LC3_10_AH4
--operation mode is normal

gr[5][10]_lut_out = reg_C1[10];
gr[5][10] = DFFE(gr[5][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L641);


--gr[4][10] is gr[4][10] at LC6_15_AJ4
--operation mode is normal

gr[4][10]_lut_out = reg_C1[10];
gr[4][10] = DFFE(gr[4][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L821);


--A1L663 is i~489 at LC9_16_AK4
--operation mode is normal

A1L663 = select_y[0] & (select_y[1] # gr[5][10]) # !select_y[0] & !select_y[1] & gr[4][10];


--gr[7][10] is gr[7][10] at LC3_13_AH4
--operation mode is normal

gr[7][10]_lut_out = reg_C1[10];
gr[7][10] = DFFE(gr[7][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L281);


--A1L763 is i~490 at LC5_16_AK4
--operation mode is normal

A1L763 = A1L663 & (gr[7][10] # !select_y[1]) # !A1L663 & gr[6][10] & select_y[1];


--gr[3][10] is gr[3][10] at LC10_3_AI4
--operation mode is normal

gr[3][10]_lut_out = reg_C1[10];
gr[3][10] = DFFE(gr[3][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L011);


--gr[1][10] is gr[1][10] at LC6_14_AL4
--operation mode is normal

gr[1][10]_lut_out = reg_C1[10];
gr[1][10] = DFFE(gr[1][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L47);


--A1L175 is i~5969 at LC5_8_AK4
--operation mode is normal

A1L175 = gr[3][10] & (gr[1][10] # select_y[1]) # !gr[3][10] & gr[1][10] & !select_y[1];


--gr[2][10] is gr[2][10] at LC5_12_AI4
--operation mode is normal

gr[2][10]_lut_out = reg_C1[10];
gr[2][10] = DFFE(gr[2][10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L29);


--A1L275 is i~5970 at LC10_8_AK4
--operation mode is normal

A1L275 = select_y[0] & A1L175 # !select_y[0] & gr[2][10] & select_y[1];


--A1L463 is i~487 at LC6_15_AK4
--operation mode is normal

A1L463 = select_y[2] & (select_y[3] # A1L763) # !select_y[2] & A1L275 & !select_y[3];


--id_ir[10] is id_ir[10] at LC3_8_Z4
--operation mode is normal

id_ir[10]_lut_out = i_datain[10];
id_ir[10] = DFFE(id_ir[10]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_C1[10] is reg_C1[10] at LC6_8_AK4
--operation mode is normal

reg_C1[10]_lut_out = mem_ir[11] & reg_C[10] # !mem_ir[11] & (A1L785 & reg_C[10] # !A1L785 & d_datain[10]);
reg_C1[10] = DFFE(reg_C1[10]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--A1L375 is i~5971 at LC6_9_AK4
--operation mode is normal

A1L375 = id_ir[10] & (reg_C1[10] # select_y[1]) # !id_ir[10] & reg_C1[10] & !select_y[1];


--smdr[10] is smdr[10] at LC3_3_AF4
--operation mode is normal

smdr[10]_lut_out = A1L995 & (A1L954 # !id_ir[10]) # !A1L995 & id_ir[10] & A1L954;
smdr[10] = DFFE(smdr[10]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L447);


--A1L475 is i~5972 at LC8_9_AK4
--operation mode is normal

A1L475 = select_y[0] & smdr[10] & !select_y[1] # !select_y[0] & A1L375;


--A1L563 is i~488 at LC5_15_AK4
--operation mode is normal

A1L563 = A1L463 & (A1L475 # !select_y[3]) # !A1L463 & select_y[3] & A1L075;


--reg_B[9] is reg_B[9] at LC10_13_AK4
--operation mode is normal

reg_B[9]_lut_out = A1L962 & (A1L982 # A1L705 & A1L652) # !A1L962 & A1L705 & A1L652;
reg_B[9] = DFFE(reg_B[9]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_C1[9] is reg_C1[9] at LC6_11_AK4
--operation mode is normal

reg_C1[9]_lut_out = A1L785 & reg_C[9] # !A1L785 & (mem_ir[11] & reg_C[9] # !mem_ir[11] & d_datain[9]);
reg_C1[9] = DFFE(reg_C1[9]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_A[9] is reg_A[9] at LC8_6_AJ4
--operation mode is normal

reg_A[9]_lut_out = !A1L712;
reg_A[9] = DFFE(reg_A[9]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--A1L473 is i~497 at LC1_13_AK4
--operation mode is normal

A1L473 = select_y[2] & (select_y[0] # reg_C1[9]) # !select_y[2] & reg_A[9] & !select_y[0];


--smdr[9] is smdr[9] at LC2_7_AJ4
--operation mode is normal

smdr[9]_lut_out = A1L106 & (A1L164 # !id_ir[10]) # !A1L106 & id_ir[10] & A1L164;
smdr[9] = DFFE(smdr[9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L447);


--A1L573 is i~498 at LC3_14_AK4
--operation mode is normal

A1L573 = A1L473 & (smdr[9] # !select_y[0]) # !A1L473 & select_y[0] & reg_B[9];


--gr[6][9] is gr[6][9] at LC2_8_AJ4
--operation mode is normal

gr[6][9]_lut_out = reg_C1[9];
gr[6][9] = DFFE(gr[6][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L461);


--gr[3][9] is gr[3][9] at LC3_16_AJ4
--operation mode is normal

gr[3][9]_lut_out = reg_C1[9];
gr[3][9] = DFFE(gr[3][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L011);


--gr[2][9] is gr[2][9] at LC5_8_AJ4
--operation mode is normal

gr[2][9]_lut_out = reg_C1[9];
gr[2][9] = DFFE(gr[2][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L29);


--A1L273 is i~495 at LC3_13_AK4
--operation mode is normal

A1L273 = select_y[0] & (select_y[2] # gr[3][9]) # !select_y[0] & gr[2][9] & !select_y[2];


--gr[7][9] is gr[7][9] at LC7_15_AH4
--operation mode is normal

gr[7][9]_lut_out = reg_C1[9];
gr[7][9] = DFFE(gr[7][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L281);


--A1L373 is i~496 at LC7_13_AK4
--operation mode is normal

A1L373 = A1L273 & (gr[7][9] # !select_y[2]) # !A1L273 & gr[6][9] & select_y[2];


--gr[4][9] is gr[4][9] at LC10_11_AJ4
--operation mode is normal

gr[4][9]_lut_out = reg_C1[9];
gr[4][9] = DFFE(gr[4][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L821);


--gr[1][9] is gr[1][9] at LC4_12_AL4
--operation mode is normal

gr[1][9]_lut_out = reg_C1[9];
gr[1][9] = DFFE(gr[1][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L47);


--zf is zf at LC9_5_AK4
--operation mode is normal

zf_lut_out = A1L206 & A1L506 & A1L306 & A1L406;
zf = DFFE(zf_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L477);


--A1L073 is i~493 at LC5_13_AK4
--operation mode is normal

A1L073 = select_y[0] & (select_y[2] # gr[1][9]) # !select_y[0] & !select_y[2] & zf;


--gr[5][9] is gr[5][9] at LC6_10_AH4
--operation mode is normal

gr[5][9]_lut_out = reg_C1[9];
gr[5][9] = DFFE(gr[5][9]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L641);


--A1L173 is i~494 at LC8_14_AK4
--operation mode is normal

A1L173 = A1L073 & (gr[5][9] # !select_y[2]) # !A1L073 & gr[4][9] & select_y[2];


--A1L863 is i~491 at LC6_14_AK4
--operation mode is normal

A1L863 = select_y[1] & (select_y[3] # A1L373) # !select_y[1] & !select_y[3] & A1L173;


--id_ir[9] is id_ir[9] at LC7_3_AI4
--operation mode is normal

id_ir[9]_lut_out = i_datain[9];
id_ir[9] = DFFE(id_ir[9]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_C[9] is reg_C[9] at LC8_7_AK4
--operation mode is normal

reg_C[9]_lut_out = F3_cs_buffer[9];
reg_C[9] = DFFE(reg_C[9]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--A1L575 is i~5973 at LC9_14_AK4
--operation mode is normal

A1L575 = select_y[2] & !select_y[0] & id_ir[9] # !select_y[2] & reg_C[9] & select_y[0];


--A1L963 is i~492 at LC5_14_AK4
--operation mode is normal

A1L963 = A1L863 & (A1L575 # !select_y[3]) # !A1L863 & select_y[3] & A1L573;


--reg_C1[8] is reg_C1[8] at LC5_9_AI4
--operation mode is normal

reg_C1[8]_lut_out = mem_ir[11] & reg_C[8] # !mem_ir[11] & (A1L785 & reg_C[8] # !A1L785 & d_datain[8]);
reg_C1[8] = DFFE(reg_C1[8]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_B[8] is reg_B[8] at LC7_14_AK4
--operation mode is normal

reg_B[8]_lut_out = A1L652 & (A1L115 # A1L982 & A1L172) # !A1L652 & A1L982 & A1L172;
reg_B[8] = DFFE(reg_B[8]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_A[8] is reg_A[8] at LC9_5_AF4
--operation mode is normal

reg_A[8]_lut_out = !A1L122;
reg_A[8] = DFFE(reg_A[8]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--A1L283 is i~505 at LC2_11_AK4
--operation mode is normal

A1L283 = select_y[0] & (reg_B[8] # select_y[2]) # !select_y[0] & !select_y[2] & reg_A[8];


--smdr[8] is smdr[8] at LC6_5_AF4
--operation mode is normal

smdr[8]_lut_out = A1L706 & (A1L364 # !id_ir[10]) # !A1L706 & id_ir[10] & A1L364;
smdr[8] = DFFE(smdr[8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L447);


--A1L383 is i~506 at LC7_11_AK4
--operation mode is normal

A1L383 = A1L283 & (smdr[8] # !select_y[2]) # !A1L283 & reg_C1[8] & select_y[2];


--gr[3][8] is gr[3][8] at LC9_9_AK4
--operation mode is normal

gr[3][8]_lut_out = reg_C1[8];
gr[3][8] = DFFE(gr[3][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L011);


--gr[6][8] is gr[6][8] at LC10_8_AJ4
--operation mode is normal

gr[6][8]_lut_out = reg_C1[8];
gr[6][8] = DFFE(gr[6][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L461);


--gr[2][8] is gr[2][8] at LC3_6_AF4
--operation mode is normal

gr[2][8]_lut_out = reg_C1[8];
gr[2][8] = DFFE(gr[2][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L29);


--A1L083 is i~503 at LC2_15_AK4
--operation mode is normal

A1L083 = select_y[2] & (gr[6][8] # select_y[0]) # !select_y[2] & gr[2][8] & !select_y[0];


--gr[7][8] is gr[7][8] at LC5_15_AH4
--operation mode is normal

gr[7][8]_lut_out = reg_C1[8];
gr[7][8] = DFFE(gr[7][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L281);


--A1L183 is i~504 at LC8_15_AK4
--operation mode is normal

A1L183 = A1L083 & (gr[7][8] # !select_y[0]) # !A1L083 & gr[3][8] & select_y[0];


--gr[4][8] is gr[4][8] at LC9_11_AJ4
--operation mode is normal

gr[4][8]_lut_out = reg_C1[8];
gr[4][8] = DFFE(gr[4][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L821);


--gr[1][8] is gr[1][8] at LC3_12_AL4
--operation mode is normal

gr[1][8]_lut_out = reg_C1[8];
gr[1][8] = DFFE(gr[1][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L47);


--nf is nf at LC8_5_AK4
--operation mode is normal

nf_lut_out = D1_unreg_res_node[15];
nf = DFFE(nf_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L477);


--A1L873 is i~501 at LC9_7_AI4
--operation mode is normal

A1L873 = select_y[0] & (select_y[2] # gr[1][8]) # !select_y[0] & nf & !select_y[2];


--gr[5][8] is gr[5][8] at LC5_16_AH4
--operation mode is normal

gr[5][8]_lut_out = reg_C1[8];
gr[5][8] = DFFE(gr[5][8]_lut_out, GLOBAL(clock), GLOBAL(reset), , A1L641);


--A1L973 is i~502 at LC10_7_AI4
--operation mode is normal

A1L973 = A1L873 & (gr[5][8] # !select_y[2]) # !A1L873 & select_y[2] & gr[4][8];


--A1L673 is i~499 at LC7_7_AI4
--operation mode is normal

A1L673 = select_y[1] & (select_y[3] # A1L183) # !select_y[1] & !select_y[3] & A1L973;


--id_ir[8] is id_ir[8] at LC3_8_AC4
--operation mode is normal

id_ir[8]_lut_out = i_datain[8];
id_ir[8] = DFFE(id_ir[8]_lut_out, GLOBAL(clock), GLOBAL(reset), , state);


--reg_C[8] is reg_C[8] at LC10_10_AK4
--operation mode is normal