pcpu.fit.summary

来自「可以实现CPU的VHDL源码」· SUMMARY 代码 · 共 13 行

Fitter Status : Successful - Tue Jan 15 16:07:55 2008
Quartus II Version : 7.2 Build 175 11/20/2007 SP 1 SJ Full Version
Revision Name : pcpu
Top-level Entity Name : pcpu
Family : APEX20KE
Device : EP20K30ETC144-1
Timing Models : Final
Total logic elements : 706 / 1,200 ( 59 % )
Total pins : 89 / 92 ( 97 % )
Total virtual pins : 0
Total memory bits : 0 / 24,576 ( 0 % )
Total PLLs : 0