pn_parser.xmsgs

来自「FPGA与ARM EPI通信，控制16路步进电机和12路DC马达 VHDL编写的」· XMSGS 代码 · 共 19 行

<?xml version="1.0" encoding="UTF-8"?>
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<messages>
<msg type="info" file="ProjectMgmt" num="1677" ><arg fmt="%s" index="1">Analyzing Verilog file \&quot;D:/armor-bridge_6-7/trunk/project/ipcore_dir/ram_3.v\&quot; into library work</arg>
</msg>

<msg type="info" file="ProjectMgmt" num="1061" ><arg fmt="%s" index="1">Parsing VHDL file &quot;D:/armor-bridge_6-7/trunk/project/ipcore_dir/ram_3.vhd&quot; into library work</arg>
</msg>

</messages>