b062b624d31e24a44467b5df188d06bfc7977f0b.svn-base

FPGA与ARM EPI通信，控制16路步进电机和12路DC马达 VHDL编写的

			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_8
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000000111";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_9
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001000";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_10
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_11
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001010";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_12
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001011";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_13
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001100";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_14
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001101";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_15
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001110";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------pulse_16
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000000001111";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= "0000000100000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------pwm_1
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= "100001000000";--2112
			ARM_FPGA_DATA <= x"03e8";--7296
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"07d3";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;			
--------------------------------------------------------------------------------pwm_2
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;--2113
			ARM_FPGA_DATA <= x"03e8";--8320
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"07c3";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;		
--------------------------------------------------------------------------------pwm_3
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;
			ARM_FPGA_DATA <= x"03e8";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"07b3";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;	
--------------------------------------------------------------------------------pwm_4
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;--2113
			ARM_FPGA_DATA <= x"03e8" ;--8320
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"07a3";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;		
--------------------------------------------------------------------------------pwm_5
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;
			ARM_FPGA_DATA <= x"03e8" ;
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0793";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;	
--------------------------------------------------------------------------------pwm_6
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;--2113
			ARM_FPGA_DATA <= x"03e8" ;--8320
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0783";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;		
--------------------------------------------------------------------------------pwm_7
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;
			ARM_FPGA_DATA <= x"03e8" ;
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0773";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;	
--------------------------------------------------------------------------------pwm_8
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;--2113
			ARM_FPGA_DATA <= x"03e8";--8320
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0763";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;		
--------------------------------------------------------------------------------pwm_9
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;
			ARM_FPGA_DATA <= x"03e8" ;
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0753";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;		
--------------------------------------------------------------------------------pwm_10
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;--2113
			ARM_FPGA_DATA <= x"03e8" ;--8320
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0743";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;		
--------------------------------------------------------------------------------pwm_11
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;
			ARM_FPGA_DATA <= x"03e8";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0733";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;	
--------------------------------------------------------------------------------pwm_12
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1 ;
			ARM_FPGA_DATA <= x"03e8" ;
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_WRITE <= '1';
			ARM_ADDR <= ARM_ADDR + 1;
			ARM_FPGA_DATA <= x"0723";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_WRITE <= '0';
			wait for CLK_period*5;	
			ARM_WRITE_OVER <= '1';
			wait for CLK_period*5;	
			ARM_WRITE_OVER <= '0';
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
----READ_Edition and Date
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------		
			wait for CLK_period*50;	
			ARM_FPGA_DATA <= "ZZZZZZZZZZZZZZZZ";
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000001000000";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_READ <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000001000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_READ <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000001000010";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_READ <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000001000011";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_READ <= '0';
			wait for CLK_period*5000;
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
----READ_coder
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------				
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000000000000";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_READ <= '0';
			wait for CLK_period*5;
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000000000001";
			wait for CLK_period*5;
			ARM_FRAME <= '0';
			ARM_READ <= '0';
			wait for CLK_period*5;
--------------------------------------------------------------------------------
			ARM_FRAME <= '1';
			ARM_READ <= '1';
			ARM_ADDR <= "000000000010";
			wait for CLK_period*5;