compare_8_bits.map.qmsg

用VERILOG语言实现了8BIT编码器.

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.2 Build 157 12/07/2004 SJ Full Version " "Info: Version 4.2 Build 157 12/07/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Tue Aug 08 13:27:24 2006 " "Info: Processing started: Tue Aug 08 13:27:24 2006" {  } {  } 0}  } {  } 4}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off Compare_8_bits -c Compare_8_bits " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off Compare_8_bits -c Compare_8_bits" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "Compare_8_bits.v 1 1 " "Info: Found 1 design units, including 1 entities, in source file Compare_8_bits.v" { { "Info" "ISGN_ENTITY_NAME" "1 Compare_8_bits " "Info: Found entity 1: Compare_8_bits" {  } { { "Compare_8_bits.v" "" { Text "D:/戴仙金/verilog/源代码/第2章/Compare_8_bits/Compare_8_bits.v" 1 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "48 " "Info: Implemented 48 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "16 " "Info: Implemented 16 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "3 " "Info: Implemented 3 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_MCELLS" "19 " "Info: Implemented 19 macrocells" {  } {  } 0} { "Info" "ISCL_SCL_TM_SEXPS" "10 " "Info: Implemented 10 shareable expanders" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Aug 08 13:27:27 2006 " "Info: Processing ended: Tue Aug 08 13:27:27 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0}  } {  } 0}