compare_8_bits.fit.eqn

用VERILOG语言实现了8BIT编码器.

--A1L74 is reduce_nor~25 at LC21
A1L74_p0_out = !A[7] & B[7];
A1L74_p1_out = !A[5] & B[5];
A1L74_p2_out = A[6] & !B[6];
A1L74_p3_out = !A[6] & B[6];
A1L74_p4_out = A[7] & !B[7];
A1L74_or_out = A1L15 # A1L74_p0_out # A1L74_p1_out # A1L74_p2_out # A1L74_p3_out # A1L74_p4_out;
A1L74 = !(A1L74_or_out);


--A1L84 is reduce_nor~32 at LC6
A1L84_p0_out = !A[7] & B[7];
A1L84_p1_out = !A[5] & B[5];
A1L84_p2_out = A[6] & !B[6];
A1L84_p3_out = !A[6] & B[6];
A1L84_p4_out = A[7] & !B[7];
A1L84_or_out = A1L45 # A1L84_p0_out # A1L84_p1_out # A1L84_p2_out # A1L84_p3_out # A1L84_p4_out;
A1L84 = A1L84_or_out;


--A1L54 is always0~64 at LC14
A1L54_or_out = B[7];
A1L54 = A[7] $ A1L54_or_out;


--A1L64 is always0~68 at LC16
A1L64_or_out = B[6];
A1L64 = A[6] $ A1L64_or_out;


--A1L72 is LessThan~696 at SEXP3
A1L72 = EXP(B[5] & !A[5]);


--A1L82 is LessThan~697 at SEXP15
A1L82 = EXP(B[4] & !A[4]);


--A1L92 is LessThan~698 at SEXP16
A1L92 = EXP(B[3] & !A[3]);


--A1L03 is LessThan~699 at SEXP14
A1L03 = EXP(B[2] & !A[2]);


--A1L13 is LessThan~700 at SEXP13
A1L13 = EXP(B[1] & !A[1]);


--A1L23 is LessThan~706 at LC8
A1L23_p0_out = A1L72 & A1L82 & A1L92 & A1L03 & A1L13 & A[0] & !B[0];
A1L23_p1_out = A1L72 & !B[4] & A[4];
A1L23_p2_out = A1L72 & A1L82 & !B[3] & A[3];
A1L23_p3_out = A1L72 & A1L82 & A1L92 & !B[2] & A[2];
A1L23_p4_out = A1L72 & A1L82 & A1L92 & A1L03 & !B[1] & A[1];
A1L23_or_out = A1L93 # A1L23_p0_out # A1L23_p1_out # A1L23_p2_out # A1L23_p3_out # A1L23_p4_out;
A1L23 = A1L23_or_out;


--A1L12 is GT~12 at LC11
A1L12_p1_out = A1L84 & A[7] & !B[7];
A1L12_p2_out = A1L84 & !A1L54 & A[6] & !B[6];
A1L12_p3_out = A1L84 & !A1L54 & !A1L64 & A1L23;
A1L12_or_out = A1L12_p1_out # A1L12_p2_out # A1L12_p3_out;
A1L12 = A1L12_or_out;


--A1L33 is LessThan~711 at SEXP12
A1L33 = EXP(A[5] & !B[5]);


--A1L43 is LessThan~712 at SEXP11
A1L43 = EXP(A[4] & !B[4]);


--A1L53 is LessThan~713 at SEXP9
A1L53 = EXP(A[3] & !B[3]);


--A1L63 is LessThan~714 at SEXP7
A1L63 = EXP(A[2] & !B[2]);


--A1L73 is LessThan~715 at SEXP1
A1L73 = EXP(A[1] & !B[1]);


--A1L83 is LessThan~721 at LC2
A1L83_p0_out = A1L33 & A1L43 & A1L53 & A1L63 & A1L73 & !A[0] & B[0];
A1L83_p1_out = A1L33 & !A[4] & B[4];
A1L83_p2_out = A1L33 & A1L43 & !A[3] & B[3];
A1L83_p3_out = A1L33 & A1L43 & A1L53 & !A[2] & B[2];
A1L83_p4_out = A1L33 & A1L43 & A1L53 & A1L63 & !A[1] & B[1];
A1L83_or_out = A1L04 # A1L83_p0_out # A1L83_p1_out # A1L83_p2_out # A1L83_p3_out # A1L83_p4_out;
A1L83 = A1L83_or_out;


--A1L32 is LT~16 at LC10
A1L32_p0_out = A1L84 & !A1L64 & !A1L54 & !A1L23 & A1L83 & A1L52 & A1L62;
A1L32_p1_out = A1L84 & A1L64 & A1L52 & A1L62 & !A[7] & B[7];
A1L32_p2_out = A1L84 & A1L64 & !A1L54 & A1L52 & A1L62 & !A[6] & B[6];
A1L32_p3_out = A1L84 & !A1L23 & A1L52 & A1L62 & !A[7] & B[7];
A1L32_p4_out = A1L84 & !A1L54 & !A1L23 & A1L52 & A1L62 & !A[6] & B[6];
A1L32_or_out = A1L42 # A1L32_p0_out # A1L32_p1_out # A1L32_p2_out # A1L32_p3_out # A1L32_p4_out;
A1L32 = A1L32_or_out;


--A1L94 is reduce_nor~33 at LC18
A1L94_p1_out = A[0] & !B[0];
A1L94 = A1L94_p1_out;


--A1L05 is reduce_nor~35 at LC19
A1L05_p0_out = !A[2] & B[2];
A1L05_p1_out = !A[0] & B[0];
A1L05_p2_out = A[1] & !B[1];
A1L05_p3_out = !A[1] & B[1];
A1L05_p4_out = A[2] & !B[2];
A1L05 = A1L94 # A1L05_p0_out # A1L05_p1_out # A1L05_p2_out # A1L05_p3_out # A1L05_p4_out;


--A1L15 is reduce_nor~41 at LC20
A1L15_p0_out = A[5] & !B[5];
A1L15_p1_out = A[3] & !B[3];
A1L15_p2_out = !A[3] & B[3];
A1L15_p3_out = A[4] & !B[4];
A1L15_p4_out = !A[4] & B[4];
A1L15 = A1L05 # A1L15_p0_out # A1L15_p1_out # A1L15_p2_out # A1L15_p3_out # A1L15_p4_out;


--A1L25 is reduce_nor~47 at LC3
A1L25_p1_out = A[0] & !B[0];
A1L25 = A1L25_p1_out;


--A1L35 is reduce_nor~49 at LC4
A1L35_p0_out = !A[2] & B[2];
A1L35_p1_out = !A[0] & B[0];
A1L35_p2_out = A[1] & !B[1];
A1L35_p3_out = !A[1] & B[1];
A1L35_p4_out = A[2] & !B[2];
A1L35 = A1L25 # A1L35_p0_out # A1L35_p1_out # A1L35_p2_out # A1L35_p3_out # A1L35_p4_out;


--A1L45 is reduce_nor~55 at LC5
A1L45_p0_out = A[5] & !B[5];
A1L45_p1_out = A[3] & !B[3];
A1L45_p2_out = !A[3] & B[3];
A1L45_p3_out = A[4] & !B[4];
A1L45_p4_out = !A[4] & B[4];
A1L45 = A1L35 # A1L45_p0_out # A1L45_p1_out # A1L45_p2_out # A1L45_p3_out # A1L45_p4_out;


--A1L93 is LessThan~722 at LC7
A1L93_p1_out = A[5] & !B[5];
A1L93 = A1L93_p1_out;


--A1L04 is LessThan~724 at LC1
A1L04_p1_out = !A[5] & B[5];
A1L04 = A1L04_p1_out;


--A1L42 is LT~17 at LC9
A1L42_p1_out = A1L84 & A1L54 & A1L52 & !A[7] & B[7];
A1L42 = A1L42_p1_out;


--A1L52 is LessThan~693sexpbal at LC13
A1L52_p1_out = A[7] & !B[7];
A1L52_or_out = A1L52_p1_out;
A1L52 = !(A1L52_or_out);


--A1L62 is LessThan~695sexpbal at LC12
A1L62_p1_out = A[6] & !B[6];
A1L62_or_out = A1L62_p1_out;
A1L62 = !(A1L62_or_out);


--A[7] is A[7] at PIN_8
--operation mode is input

A[7] = INPUT();


--A[6] is A[6] at PIN_17
--operation mode is input

A[6] = INPUT();


--A[5] is A[5] at PIN_18
--operation mode is input

A[5] = INPUT();


--A[4] is A[4] at PIN_19
--operation mode is input

A[4] = INPUT();


--A[3] is A[3] at PIN_20
--operation mode is input

A[3] = INPUT();


--A[2] is A[2] at PIN_25
--operation mode is input

A[2] = INPUT();


--A[1] is A[1] at PIN_21
--operation mode is input

A[1] = INPUT();


--A[0] is A[0] at PIN_24
--operation mode is input

A[0] = INPUT();


--B[7] is B[7] at PIN_44
--operation mode is input

B[7] = INPUT();


--B[6] is B[6] at PIN_6
--operation mode is input

B[6] = INPUT();


--B[5] is B[5] at PIN_9
--operation mode is input

B[5] = INPUT();


--B[4] is B[4] at PIN_36
--operation mode is input

B[4] = INPUT();


--B[3] is B[3] at PIN_26
--operation mode is input

B[3] = INPUT();


--B[2] is B[2] at PIN_34
--operation mode is input

B[2] = INPUT();


--B[1] is B[1] at PIN_12
--operation mode is input

B[1] = INPUT();


--B[0] is B[0] at PIN_33
--operation mode is input

B[0] = INPUT();


--EQ is EQ at PIN_37
--operation mode is output

EQ = OUTPUT(A1L74);


--GT is GT at PIN_16
--operation mode is output

GT = OUTPUT(A1L12);


--LT is LT at PIN_14
--operation mode is output

LT = OUTPUT(A1L32);