fsk.hif

用vhdl写的fpga移频键控程序

Version 7.2 Build 151 09/26/2007 SJ Full Version
11
920
OFF
OFF
OFF
OFF
ON
ON
ON
FV_OFF
Level2
0
0
VRSM_ON
VHSM_ON
0
-- Start Partition --
-- End Partition --
-- Start Library Paths --
-- End Library Paths --
-- Start VHDL Libraries --
-- End VHDL Libraries --
# entity
FSK
# storage
db|FSK.(0).cnf
db|FSK.(0).cnf
# case_insensitive
# source_file
FSK.bdf
282c157cfa27fbec919284759b26e6f
25
# internal_option {
BLOCK_DESIGN_NAMING
OFF
}
# hierarchies {
|
}
# lmf
d:|program files|altera|72|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
PL_FSK2
# storage
db|FSK.(1).cnf
db|FSK.(1).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
PL_FSK2.vhd
ed57693e17552abae973ae2fcbe0dc9d
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
PL_FSK2:inst12
}
# lmf
d:|program files|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
PL_FSK
# storage
db|FSK.(2).cnf
db|FSK.(2).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
PL_FSK.vhd
8229f67d7c48f5dc98cdf98bb3274f27
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
PL_FSK:inst
}
# lmf
d:|program files|altera|72|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# complete