jishu16.fit

本程序利用VHDL语言实现拔河游戏机的功能

-- MAX+plus II Compiler Fit File      
-- Version 10.0 9/14/2000             
-- Compiled: 03/17/2008 22:03:49      

-- Copyright (C) 1988-2000 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "jishu16"
BEGIN

    DEVICE = "EPF10K20TI144-4";

    "clk"                          : INPUT_PIN  = 55     ;
    "clr"                          : INPUT_PIN  = 54     ;
    "input"                        : INPUT_PIN  = 56     ;
    "qa"                           : OUTPUT_PIN = 144    ;
    "qb"                           : OUTPUT_PIN = 7      ;
    "qc"                           : OUTPUT_PIN = 143    ;
    "qd"                           : OUTPUT_PIN = 101    ;
    "|LPM_ADD_SUB:58|addcore:adder|:59" : LOCATION   = LC3_A16;
    "|LPM_ADD_SUB:79|addcore:adder|pcarry2" : LOCATION   = LC5_A16;
    ":8"                           : LOCATION   = LC4_A16;  -- temp3
    ":9"                           : LOCATION   = LC1_A16;  -- temp2
    ":10"                          : LOCATION   = LC7_A16;  -- temp1
    ":11"                          : LOCATION   = LC2_A16;  -- temp0

END;

INTERNAL_INFO "jishu16"
BEGIN
	DEVICE = EPF10K20TI144-4;
    OD5P55  : LORAX = "1:FB5->LC4_A16,->LC1_A16,->LC7_A16,->LC2_A16|";
    OD2P54  : LORAX = "1:FB2->LC4_A16,->LC1_A16,->LC7_A16,->LC2_A16|";
    OD3P56  : LORAX = "1:FB3|2:FH3R0,PA5R0C15->LC4_A16,->LC1_A16,->LC7_A16||";
    LC4_A16 : LORAX = "1:MSW3R0C15,G15R0->OH11R0P101|";
    LC1_A16 : LORAX = "1:MSW0R0C15,HHR19R0->OH0R0P143|";
    LC7_A16 : LORAX = "1:MSW6R0C15,HHR26R0->OH6R0P7|";
    LC2_A16 : LORAX = "1:MSW1R0C15,HHR12R0->OH1R0P144|";
	LC3_A16 : LORAX2 = "X, LC7_A16, LC1_A16, LC2_A16";
	LC5_A16 : LORAX2 = "X, LC7_A16, LC1_A16, LC2_A16";
	LC4_A16 : LORAX2 = "OD3P56, LC5_A16, LC3_A16, LC4_A16";
	LC1_A16 : LORAX2 = "OD3P56, LC7_A16, LC1_A16, LC2_A16";
	LC7_A16 : LORAX2 = "X, OD3P56, LC7_A16, LC2_A16";
	LC2_A16 : LORAX2 = "X, X, X, LC2_A16";
END;