nand_interface.hier_info

利用MAX II CPLD 实现 NAND 闪存接口

|nand_interface
h_rd_wr => re~0.IN0
h_rd_wr => we~0.IN0
h_cntrl[0] => decod5.IN0
h_cntrl[0] => decod3.IN0
h_cntrl[0] => decod1.IN0
h_cntrl[0] => decod2.IN0
h_cntrl[0] => decod4.IN0
h_cntrl[0] => decod0~0.IN0
h_cntrl[0] => decod6.IN0
h_cntrl[1] => decod6~0.IN0
h_cntrl[1] => decod3~0.IN0
h_cntrl[1] => decod4~0.IN0
h_cntrl[1] => decod1~0.IN0
h_cntrl[2] => decod6~0.IN1
h_cntrl[2] => decod4~0.IN1
h_cntrl[2] => decod3~0.IN1
h_cntrl[2] => decod1~0.IN1
e_d => Decoder0.IN0
reset => int_ce.ACLR
reset => int_wp.ACLR
reset => int_se.PRESET
reset => int_ale.ACLR
ce <= int_ce.DB_MAX_OUTPUT_PORT_TYPE
re <= re~0.DB_MAX_OUTPUT_PORT_TYPE
ale <= int_ale.DB_MAX_OUTPUT_PORT_TYPE
cle <= decod0~0.DB_MAX_OUTPUT_PORT_TYPE
se <= int_se.DB_MAX_OUTPUT_PORT_TYPE
we <= we~0.DB_MAX_OUTPUT_PORT_TYPE
wp <= int_wp.DB_MAX_OUTPUT_PORT_TYPE