nand_interface.fit.smsg

来自「利用MAX II CPLD 实现 NAND 闪存接口」· SMSG 代码 · 共 5 行

Extra Info: Performing register packing on registers with non-logic cell location assignments
Extra Info: Completed register packing on registers with non-logic cell location assignments
Extra Info: Moving registers into LUTs to improve timing and density
Extra Info: Finished moving registers into LUTs: elapsed time is 00:00:00