part7.map.summary

来自「基于FPGA的CPU设计 VHDL 编写」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Thu Apr 19 16:16:04 2007
Quartus II Version : 5.1 Build 176 10/26/2005 SJ Full Version
Revision Name : part7
Top-level Entity Name : part7
Family : Cyclone II
Total combinational functions : 35
Total registers : 14
Total pins : 125
Total virtual pins : 0
Total memory bits : 0
Embedded Multiplier 9-bit elements : 0
Total PLLs : 0