part1.tan.rpt

基于FPGA的CPU设计 VHDL 编写

; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg2 ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a2~porta_memory_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg3 ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a3~porta_memory_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg4 ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a4~porta_memory_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg5 ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a5~porta_memory_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg6 ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a6~porta_memory_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
; N/A   ; Restricted to 200.00 MHz ( period = 5.000 ns ) ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg7 ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a7~porta_memory_reg0 ; CLOCK      ; CLOCK    ; None                        ; None                      ; 2.645 ns                ;
+-------+------------------------------------------------+---------------------------------------------------------------------------------------------------------+---------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tsu                                                                                                                                                                 ;
+-------+--------------+------------+-----------+----------------------------------------------------------------------------------------------------------+----------+
; Slack ; Required tsu ; Actual tsu ; From      ; To                                                                                                       ; To Clock ;
+-------+--------------+------------+-----------+----------------------------------------------------------------------------------------------------------+----------+
; N/A   ; None         ; 4.002 ns   ; ADDR[0]   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; CLOCK    ;
; N/A   ; None         ; 3.860 ns   ; DATAIN[2] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg2  ; CLOCK    ;
; N/A   ; None         ; 3.611 ns   ; DATAIN[7] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg7  ; CLOCK    ;
; N/A   ; None         ; 3.590 ns   ; DATAIN[1] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg1  ; CLOCK    ;
; N/A   ; None         ; 3.586 ns   ; DATAIN[4] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg4  ; CLOCK    ;
; N/A   ; None         ; 3.582 ns   ; DATAIN[5] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg5  ; CLOCK    ;
; N/A   ; None         ; 3.446 ns   ; DATAIN[6] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg6  ; CLOCK    ;
; N/A   ; None         ; 3.435 ns   ; ADDR[4]   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; CLOCK    ;
; N/A   ; None         ; 3.409 ns   ; ADDR[1]   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; CLOCK    ;
; N/A   ; None         ; 3.385 ns   ; DATAIN[3] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg3  ; CLOCK    ;
; N/A   ; None         ; 3.130 ns   ; ADDR[2]   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; CLOCK    ;
; N/A   ; None         ; 3.127 ns   ; ADDR[3]   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; CLOCK    ;
; N/A   ; None         ; 1.372 ns   ; DATAIN[0] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK    ;
; N/A   ; None         ; 1.070 ns   ; WR        ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; CLOCK    ;
+-------+--------------+------------+-----------+----------------------------------------------------------------------------------------------------------+----------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; tco                                                                                                                                                                    ;
+-------+--------------+------------+----------------------------------------------------------------------------------------------------------+------------+------------+
; Slack ; Required tco ; Actual tco ; From                                                                                                     ; To         ; From Clock ;
+-------+--------------+------------+----------------------------------------------------------------------------------------------------------+------------+------------+
; N/A   ; None         ; 10.125 ns  ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[0] ; CLOCK      ;
; N/A   ; None         ; 10.125 ns  ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[0] ; CLOCK      ;
; N/A   ; None         ; 10.125 ns  ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[0] ; CLOCK      ;
; N/A   ; None         ; 10.125 ns  ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[0] ; CLOCK      ;
; N/A   ; None         ; 10.125 ns  ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[0] ; CLOCK      ;
; N/A   ; None         ; 10.125 ns  ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[0] ; CLOCK      ;
; N/A   ; None         ; 9.800 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[4] ; CLOCK      ;
; N/A   ; None         ; 9.800 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[4] ; CLOCK      ;
; N/A   ; None         ; 9.800 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[4] ; CLOCK      ;
; N/A   ; None         ; 9.800 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[4] ; CLOCK      ;
; N/A   ; None         ; 9.800 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[4] ; CLOCK      ;
; N/A   ; None         ; 9.800 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[4] ; CLOCK      ;
; N/A   ; None         ; 9.744 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[3] ; CLOCK      ;
; N/A   ; None         ; 9.744 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[3] ; CLOCK      ;
; N/A   ; None         ; 9.744 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[3] ; CLOCK      ;
; N/A   ; None         ; 9.744 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[3] ; CLOCK      ;
; N/A   ; None         ; 9.744 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[3] ; CLOCK      ;
; N/A   ; None         ; 9.744 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[3] ; CLOCK      ;
; N/A   ; None         ; 9.523 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[7] ; CLOCK      ;
; N/A   ; None         ; 9.523 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[7] ; CLOCK      ;
; N/A   ; None         ; 9.523 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[7] ; CLOCK      ;
; N/A   ; None         ; 9.523 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[7] ; CLOCK      ;
; N/A   ; None         ; 9.523 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[7] ; CLOCK      ;
; N/A   ; None         ; 9.523 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[7] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[5] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[5] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[5] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[5] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[5] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[5] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[2] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[2] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[2] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[2] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[2] ; CLOCK      ;
; N/A   ; None         ; 9.506 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[2] ; CLOCK      ;
; N/A   ; None         ; 9.323 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[1] ; CLOCK      ;
; N/A   ; None         ; 9.323 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[1] ; CLOCK      ;
; N/A   ; None         ; 9.323 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[1] ; CLOCK      ;
; N/A   ; None         ; 9.323 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[1] ; CLOCK      ;
; N/A   ; None         ; 9.323 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[1] ; CLOCK      ;
; N/A   ; None         ; 9.323 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[1] ; CLOCK      ;
; N/A   ; None         ; 9.306 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; DATAOUT[6] ; CLOCK      ;
; N/A   ; None         ; 9.306 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg0 ; DATAOUT[6] ; CLOCK      ;
; N/A   ; None         ; 9.306 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg1 ; DATAOUT[6] ; CLOCK      ;
; N/A   ; None         ; 9.306 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg2 ; DATAOUT[6] ; CLOCK      ;
; N/A   ; None         ; 9.306 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg3 ; DATAOUT[6] ; CLOCK      ;
; N/A   ; None         ; 9.306 ns   ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_address_reg4 ; DATAOUT[6] ; CLOCK      ;
+-------+--------------+------------+----------------------------------------------------------------------------------------------------------+------------+------------+


+---------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; th                                                                                                                                                                        ;
+---------------+-------------+-----------+-----------+----------------------------------------------------------------------------------------------------------+----------+
; Minimum Slack ; Required th ; Actual th ; From      ; To                                                                                                       ; To Clock ;
+---------------+-------------+-----------+-----------+----------------------------------------------------------------------------------------------------------+----------+
; N/A           ; None        ; -0.801 ns ; WR        ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_we_reg       ; CLOCK    ;
; N/A           ; None        ; -1.103 ns ; DATAIN[0] ; ramlpm:u0|altsyncram:altsyncram_component|altsyncram_s8h1:auto_generated|ram_block1a0~porta_datain_reg0  ; CLOCK    ;