part6.fit.eqn

基于FPGA的CPU设计 VHDL 编写

--C1_hub_tdo is sld_hub:sld_hub_inst|hub_tdo at LCFF_X46_Y15_N25
C1_hub_tdo = AMPP_FUNCTION(!A1L112, C1L18, !P1_state[8]);


--P1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3] at LCFF_X45_Y15_N7
P1_state[3] = AMPP_FUNCTION(A1L112, P1L20);


--P1_state[4] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[4] at LCFF_X42_Y15_N21
P1_state[4] = AMPP_FUNCTION(A1L112, P1L21, A1L114);


--P1L23 is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state~14 at LCCOMB_X45_Y15_N8
P1L23 = AMPP_FUNCTION(P1_state[3], A1L114, P1_state[4]);


--L5_Q[2] is sld_hub:sld_hub_inst|sld_dffex:\GEN_SHADOW_IRF:1:S_IRF|Q[2] at LCFF_X48_Y15_N11
L5_Q[2] = AMPP_FUNCTION(A1L112, L5L6, C1L3, C1L6);


--L3_Q[2] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[2] at LCFF_X44_Y15_N15
L3_Q[2] = AMPP_FUNCTION(A1L112, C1L32, C1L3, L3L4);


--C1L23 is sld_hub:sld_hub_inst|IRF_D[1][2]~45 at LCCOMB_X48_Y15_N20
C1L23 = AMPP_FUNCTION(L5_Q[2], L2_Q[0], L3_Q[2]);


--C1_CLRN_SIGNAL is sld_hub:sld_hub_inst|CLRN_SIGNAL at LCFF_X46_Y16_N25
C1_CLRN_SIGNAL = AMPP_FUNCTION(A1L112, C1L2);


--C1_OK_TO_UPDATE_IR_Q is sld_hub:sld_hub_inst|OK_TO_UPDATE_IR_Q at LCFF_X45_Y15_N21
C1_OK_TO_UPDATE_IR_Q = AMPP_FUNCTION(A1L112, C1L43);


--C1L7 is sld_hub:sld_hub_inst|GEN_SHADOW_IRF~9 at LCCOMB_X47_Y15_N22
C1L7 = AMPP_FUNCTION(C1_OK_TO_UPDATE_IR_Q, P1_state[5]);


--L7_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0] at LCFF_X45_Y15_N29
L7_Q[0] = AMPP_FUNCTION(A1L112, L7L3, C1L26);


--Q1_dffe1a[2] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[2] at LCFF_X44_Y15_N13
Q1_dffe1a[2] = AMPP_FUNCTION(A1L112, Q1_w_anode28w[3], C1L3, C1L5);


--C1L28 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~64 at LCCOMB_X45_Y15_N10
C1L28 = AMPP_FUNCTION(L7_Q[0], Q1_dffe1a[2]);


--C1L29 is sld_hub:sld_hub_inst|IRF_ENABLE[1]~65 at LCCOMB_X47_Y15_N30
C1L29 = AMPP_FUNCTION(C1L28, L6_Q[0], L2_Q[0], C1L7);


--C1_jtag_debug_mode_usr0 is sld_hub:sld_hub_inst|jtag_debug_mode_usr0 at LCFF_X47_Y16_N5
C1_jtag_debug_mode_usr0 = AMPP_FUNCTION(A1L112, A1L217, P1L3, P1_state[12]);


--C1L38 is sld_hub:sld_hub_inst|jtag_debug_mode~2 at LCCOMB_X44_Y15_N22
C1L38 = AMPP_FUNCTION(C1_jtag_debug_mode_usr0, C1_jtag_debug_mode_usr1);


--P1_state[12] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[12] at LCFF_X46_Y16_N7
P1_state[12] = AMPP_FUNCTION(A1L112, P1L32);


--P1_state[2] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[2] at LCFF_X46_Y16_N9
P1_state[2] = AMPP_FUNCTION(A1L112, P1L33);


--C1L39 is sld_hub:sld_hub_inst|jtag_debug_mode~171 at LCCOMB_X46_Y16_N16
C1L39 = AMPP_FUNCTION(P1_state[2], A1L114, P1_state[12]);


--P1_state[15] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[15] at LCFF_X45_Y16_N3
P1_state[15] = AMPP_FUNCTION(A1L112, P1L31, !A1L114);


--C1L40 is sld_hub:sld_hub_inst|jtag_debug_mode~172 at LCCOMB_X47_Y15_N28
C1L40 = AMPP_FUNCTION(P1_state[15], C1L38, C1_jtag_debug_mode, C1L39);


--P1_state[0] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[0] at LCFF_X46_Y16_N5
P1_state[0] = AMPP_FUNCTION(A1L112, P1L35);


--C1L26 is sld_hub:sld_hub_inst|IRF_ENA_ENABLE~21 at LCCOMB_X45_Y15_N26
C1L26 = AMPP_FUNCTION(C1_OK_TO_UPDATE_IR_Q, C1_jtag_debug_mode_usr1, A1L114, P1_state[4]);


--N1_dffs[1] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[1] at LCFF_X47_Y16_N1
N1_dffs[1] = AMPP_FUNCTION(A1L112, N1L5, P1L3, P1_state[11]);


--N1_dffs[9] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[9] at LCFF_X50_Y15_N31
N1_dffs[9] = AMPP_FUNCTION(A1L112, altera_internal_jtag, P1L3, GND, P1_state[11]);


--N1_dffs[8] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[8] at LCFF_X50_Y15_N5
N1_dffs[8] = AMPP_FUNCTION(A1L112, N1L15, P1L3, P1_state[11]);


--N1_dffs[7] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[7] at LCFF_X50_Y15_N17
N1_dffs[7] = AMPP_FUNCTION(A1L112, N1_dffs[8], P1L3, GND, P1_state[11]);


--N1_dffs[6] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[6] at LCFF_X50_Y15_N9
N1_dffs[6] = AMPP_FUNCTION(A1L112, N1_dffs[7], P1L3, GND, P1_state[11]);


--A1L218 is rtl~76 at LCCOMB_X50_Y15_N16
A1L218 = !N1_dffs[8] & !N1_dffs[6] & !N1_dffs[7] & !N1_dffs[9];


--N1_dffs[3] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[3] at LCFF_X50_Y15_N25
N1_dffs[3] = AMPP_FUNCTION(A1L112, N1L8, P1L3, P1_state[11]);


--N1_dffs[2] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[2] at LCFF_X50_Y15_N1
N1_dffs[2] = AMPP_FUNCTION(A1L112, N1_dffs[3], P1L3, GND, P1_state[11]);


--N1_dffs[5] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[5] at LCFF_X50_Y15_N23
N1_dffs[5] = AMPP_FUNCTION(A1L112, N1_dffs[6], P1L3, GND, P1_state[11]);


--N1_dffs[4] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[4] at LCFF_X50_Y15_N7
N1_dffs[4] = AMPP_FUNCTION(A1L112, N1L10, P1L3, P1_state[11]);


--A1L219 is rtl~77 at LCCOMB_X50_Y15_N22
A1L219 = N1_dffs[3] & N1_dffs[2] & !N1_dffs[5] & !N1_dffs[4];


--N1_dffs[0] is sld_hub:sld_hub_inst|lpm_shiftreg:jtag_ir_register|dffs[0] at LCFF_X47_Y16_N17
N1_dffs[0] = AMPP_FUNCTION(A1L112, N1L3, P1L3, P1_state[11]);


--A1L216 is rtl~0 at LCCOMB_X46_Y15_N30
A1L216 = A1L219 & N1_dffs[1] & A1L218 & !N1_dffs[0];


--Q1_dffe1a[1] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[1] at LCFF_X44_Y15_N11
Q1_dffe1a[1] = AMPP_FUNCTION(A1L112, Q1_w_anode18w[3], C1L3, C1L5);


--L2L3 is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~52 at LCCOMB_X45_Y15_N2
L2L3 = AMPP_FUNCTION(L7_Q[0], Q1_dffe1a[1]);


--P1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8] at LCFF_X45_Y16_N17
P1_state[8] = AMPP_FUNCTION(A1L112, P1L26, !A1L114);


--L1L3 is sld_hub:sld_hub_inst|sld_dffex:RESET|Q[0]~59 at LCCOMB_X45_Y15_N18
L1L3 = AMPP_FUNCTION(C1_OK_TO_UPDATE_IR_Q, P1_state[8]);


--L2L4 is sld_hub:sld_hub_inst|sld_dffex:BROADCAST|Q[0]~53 at LCCOMB_X45_Y15_N12
L2L4 = AMPP_FUNCTION(L2L3, L1L3, L2_Q[0], C1L28);


--L4_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3] at LCFF_X48_Y15_N27
L4_Q[3] = AMPP_FUNCTION(A1L112, C1L24, C1L3, C1L29);


--L4_Q[1] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1] at LCFF_X48_Y15_N9
L4_Q[1] = AMPP_FUNCTION(A1L112, C1L22, C1L3, C1L29);


--H1_ram_rom_data_shift_cntr_reg[1] is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[1] at LCFF_X46_Y14_N13
H1_ram_rom_data_shift_cntr_reg[1] = AMPP_FUNCTION(A1L112, H1L61, !L4L8, H1L72);


--H1_ram_rom_data_shift_cntr_reg[0] is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[0] at LCFF_X46_Y14_N11
H1_ram_rom_data_shift_cntr_reg[0] = AMPP_FUNCTION(A1L112, H1L58, !L4L8, H1L72);


--H1_ram_rom_data_shift_cntr_reg[2] is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[2] at LCFF_X46_Y14_N15
H1_ram_rom_data_shift_cntr_reg[2] = AMPP_FUNCTION(A1L112, H1L64, !L4L8, H1L72);


--H1_ram_rom_data_shift_cntr_reg[3] is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_shift_cntr_reg[3] at LCFF_X46_Y14_N17
H1_ram_rom_data_shift_cntr_reg[3] = AMPP_FUNCTION(A1L112, H1L67, !L4L8, H1L72);


--H1L72 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|rtl~0 at LCCOMB_X46_Y15_N16
H1L72 = AMPP_FUNCTION(H1_ram_rom_data_shift_cntr_reg[3], H1_ram_rom_data_shift_cntr_reg[0], H1_ram_rom_data_shift_cntr_reg[2], H1_ram_rom_data_shift_cntr_reg[1]);


--H1L17 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|process1~1 at LCCOMB_X46_Y15_N26
H1L17 = AMPP_FUNCTION(H1L72, L4_Q[3], L4_Q[1]);


--H1L48 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg~652 at LCCOMB_X50_Y15_N2
H1L48 = AMPP_FUNCTION(H1_ram_rom_data_reg[1], J1_q_b[0], H1L17);


--L4L5 is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[1]~61 at LCCOMB_X46_Y15_N4
L4L5 = AMPP_FUNCTION(L4_Q[1], L4_Q[2]);


--H1L47 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_data_reg[7]~653 at LCCOMB_X46_Y15_N2
H1L47 = AMPP_FUNCTION(H1L15, P1_state[4], L4L5, H1L17);


--H1L70 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~19 at LCCOMB_X47_Y15_N26
H1L70 = AMPP_FUNCTION(H1L15, L4_Q[2]);


--H1L71 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr~20 at LCCOMB_X47_Y15_N6
H1L71 = AMPP_FUNCTION(H1_ram_rom_data_shift_cntr_reg[0], H1_ram_rom_data_shift_cntr_reg[2], L4_Q[1], H1_ram_rom_data_shift_cntr_reg[3]);


--H1_ram_rom_incr_addr is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_incr_addr at LCCOMB_X47_Y15_N8
H1_ram_rom_incr_addr = AMPP_FUNCTION(H1L71, H1L70, P1_state[8], H1_ram_rom_data_shift_cntr_reg[1]);


--H1L24 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~80 at LCCOMB_X47_Y15_N12
H1L24 = AMPP_FUNCTION(H1_ram_rom_addr_reg[0], H1_ram_rom_incr_addr, GND);

--H1L25 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[0]~81 at LCCOMB_X47_Y15_N12
H1L25 = AMPP_FUNCTION(H1_ram_rom_addr_reg[0], H1_ram_rom_incr_addr);


--L4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[0] at LCFF_X48_Y15_N25
L4_Q[0] = AMPP_FUNCTION(A1L112, C1L21, C1L3, C1L29);


--H1L16 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|process0~11 at LCCOMB_X47_Y15_N10
H1L16 = AMPP_FUNCTION(P1_state[4], L4_Q[3], H1L15);


--H1L27 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~82 at LCCOMB_X47_Y15_N14
H1L27 = AMPP_FUNCTION(H1_ram_rom_addr_reg[1], GND, H1L25);

--H1L28 is ramlpm:comb_42|altsyncram:altsyncram_component|altsyncram_2ih1:auto_generated|sld_mod_ram_rom:mgl_prim2|ram_rom_addr_reg[1]~83 at LCCOMB_X47_Y15_N14
H1L28 = AMPP_FUNCTION(H1_ram_rom_addr_reg[1], H1L25);