part3.fit.summary

基于FPGA的CPU设计 VHDL 编写

Fitter Status : Successful - Tue Aug 07 17:29:03 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : part3
Top-level Entity Name : part3
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 35 / 33,216 ( < 1 % )
Total registers : 0
Total pins : 86 / 475 ( 18 % )
Total virtual pins : 0
Total memory bits : 256 / 483,840 ( < 1 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )