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📄 adc.fit.eqn

📁 基于北京革新公司出品的EDA实验工具箱的数模转换程序。该程序将输入的5V信号从01至FF量化并通过2位数码管进行显示。量化精度为0.1v。编译环境为quartusll.5.1版本。fpga芯片为EP1
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L60Q is wr~reg0 at LC_X33_Y2_N5
--operation mode is normal

A1L60Q_lut_out = sta.s0;
A1L60Q = DFFEAS(A1L60Q_lut_out, GLOBAL(clkcount[3]), VCC, , , , , , );


--A1L33Q is rd~reg0 at LC_X34_Y2_N7
--operation mode is normal

A1L33Q_lut_out = !sta.s2;
A1L33Q = DFFEAS(A1L33Q_lut_out, GLOBAL(clkcount[3]), VCC, , , , , , );


--A1L8Q is cs~reg0 at LC_X33_Y2_N4
--operation mode is normal

A1L8Q_lut_out = !sta.s2 & sta.s0;
A1L8Q = DFFEAS(A1L8Q_lut_out, GLOBAL(clkcount[3]), VCC, , , , , , );


--clkcount[0] is clkcount[0] at LC_X11_Y6_N6
--operation mode is normal

clkcount[0]_lut_out = !clkcount[0];
clkcount[0] = DFFEAS(clkcount[0]_lut_out, GLOBAL(clk), VCC, , , , , , );


--data[4] is data[4] at LC_X34_Y2_N9
--operation mode is normal

data[4]_lut_out = dati[4];
data[4] = DFFEAS(data[4]_lut_out, GLOBAL(clkcount[3]), VCC, , !A1L33Q, , , , );


--A1L27 is hexd[0]~62 at LC_X34_Y2_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[0]_qfbk = data[0];
A1L27 = clkcount[0] & (data[0]_qfbk) # !clkcount[0] & data[4];

--data[0] is data[0] at LC_X34_Y2_N4
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[0] = DFFEAS(A1L27, GLOBAL(clkcount[3]), VCC, , !A1L33Q, dati[0], , , VCC);


--A1L47 is s~1357 at LC_X34_Y2_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[5]_qfbk = data[5];
A1L47 = !A1L27 & (clkcount[0] & (!data[1]) # !clkcount[0] & !data[5]_qfbk);

--data[5] is data[5] at LC_X34_Y2_N1
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[5] = DFFEAS(A1L47, GLOBAL(clkcount[3]), VCC, , !A1L33Q, dati[5], , , VCC);


--A1L30 is hexd[3]~63 at LC_X34_Y2_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[3]_qfbk = data[3];
A1L30 = clkcount[0] & (data[3]_qfbk) # !clkcount[0] & data[7];

--data[3] is data[3] at LC_X34_Y2_N2
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[3] = DFFEAS(A1L30, GLOBAL(clkcount[3]), VCC, , !A1L33Q, dati[3], , , VCC);


--data[6] is data[6] at LC_X34_Y2_N6
--operation mode is normal

data[6]_lut_out = dati[6];
data[6] = DFFEAS(data[6]_lut_out, GLOBAL(clkcount[3]), VCC, , !A1L33Q, , , , );


--A1L29 is hexd[2]~64 at LC_X34_Y2_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[2]_qfbk = data[2];
A1L29 = clkcount[0] & (data[2]_qfbk) # !clkcount[0] & data[6];

--data[2] is data[2] at LC_X34_Y2_N5
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[2] = DFFEAS(A1L29, GLOBAL(clkcount[3]), VCC, , !A1L33Q, dati[2], , , VCC);


--A1L28 is hexd[1]~65 at LC_X34_Y2_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[1]_qfbk = data[1];
A1L28 = clkcount[0] & (data[1]_qfbk) # !clkcount[0] & data[5];

--data[1] is data[1] at LC_X34_Y2_N3
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[1] = DFFEAS(A1L28, GLOBAL(clkcount[3]), VCC, , !A1L33Q, dati[1], , , VCC);


--A1L48 is s~1358 at LC_X34_Y19_N0
--operation mode is normal

A1L48 = !A1L30 & A1L27 & (A1L28 $ !A1L29);


--A1L49 is s~1359 at LC_X34_Y19_N6
--operation mode is normal

A1L49 = A1L47 & (A1L48 # A1L29 $ !A1L30) # !A1L47 & A1L48 & (!A1L30 # !A1L29);


--A1L50 is s~1360 at LC_X34_Y19_N7
--operation mode is normal

A1L50 = A1L28 & !A1L30 & (A1L27 # !A1L29) # !A1L28 & A1L27 & (A1L30 $ !A1L29);


--A1L51 is s~1361 at LC_X34_Y19_N3
--operation mode is normal

A1L51 = A1L28 & !A1L30 & (A1L27) # !A1L28 & (A1L29 & !A1L30 # !A1L29 & (A1L27));


--A1L52 is s~1362 at LC_X34_Y19_N2
--operation mode is normal

A1L52 = A1L28 & (A1L29 & (A1L27) # !A1L29 & A1L30 & !A1L27) # !A1L28 & !A1L30 & (A1L29 $ A1L27);


--A1L53 is s~1363 at LC_X34_Y19_N8
--operation mode is normal

A1L53 = A1L30 & (!A1L28 & A1L27 # !A1L29) # !A1L30 & (A1L29 # A1L27 # !A1L28);


--A1L54 is s~1364 at LC_X34_Y2_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[7]_qfbk = data[7];
A1L54 = A1L29 & (clkcount[0] & data[3] # !clkcount[0] & (data[7]_qfbk));

--data[7] is data[7] at LC_X34_Y2_N0
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

data[7] = DFFEAS(A1L54, GLOBAL(clkcount[3]), VCC, , !A1L33Q, dati[7], , , VCC);


--A1L55 is s~1365 at LC_X34_Y19_N9
--operation mode is normal

A1L55 = A1L28 & (A1L27 & A1L30 # !A1L27 & (A1L29)) # !A1L28 & A1L29 & (A1L30 # A1L27);


--A1L56 is s~1366 at LC_X34_Y19_N4
--operation mode is normal

A1L56 = A1L54 & (A1L27 & !A1L28) # !A1L54 & !A1L55;


--A1L57 is s~1367 at LC_X34_Y19_N1
--operation mode is normal

A1L57 = A1L28 & A1L30 & (A1L29 # A1L27) # !A1L28 & (A1L29 $ (!A1L30 & A1L27));


--A1L58 is s~1368 at LC_X34_Y19_N5
--operation mode is normal

A1L58 = A1L54 & (A1L27 & !A1L28) # !A1L54 & A1L57;


--sta.s0 is sta.s0 at LC_X34_Y2_N8
--operation mode is normal
--sload is tied to vcc, which is functionally the same as treating the sdata port as the data input.

sta.s0_lut_out = GND;
sta.s0 = DFFEAS(sta.s0_lut_out, GLOBAL(clkcount[3]), VCC, , , A1L33Q, , , VCC);


--clkcount[3] is clkcount[3] at LC_X11_Y6_N4
--operation mode is normal

clkcount[3]_lut_out = clkcount[3] $ (clkcount[2] & clkcount[1] & clkcount[0]);
clkcount[3] = DFFEAS(clkcount[3]_lut_out, GLOBAL(clk), VCC, , , , , , );


--sta.s2 is sta.s2 at LC_X33_Y2_N2
--operation mode is normal

sta.s2_lut_out = !A1L60Q;
sta.s2 = DFFEAS(sta.s2_lut_out, GLOBAL(clkcount[3]), VCC, , , , , , );


--clkcount[2] is clkcount[2] at LC_X11_Y6_N2
--operation mode is normal

clkcount[2]_lut_out = clkcount[2] $ (clkcount[1] & clkcount[0]);
clkcount[2] = DFFEAS(clkcount[2]_lut_out, GLOBAL(clk), VCC, , , , , , );


--clkcount[1] is clkcount[1] at LC_X11_Y6_N5
--operation mode is normal

clkcount[1]_lut_out = clkcount[1] $ (clkcount[0]);
clkcount[1] = DFFEAS(clkcount[1]_lut_out, GLOBAL(clk), VCC, , , , , , );


--int is int at PIN_124
--operation mode is input

int = INPUT();


--clk is clk at PIN_152
--operation mode is input

clk = INPUT();


--dati[5] is dati[5] at PIN_119
--operation mode is input

dati[5] = INPUT();


--dati[1] is dati[1] at PIN_115
--operation mode is input

dati[1] = INPUT();


--dati[0] is dati[0] at PIN_114
--operation mode is input

dati[0] = INPUT();


--dati[4] is dati[4] at PIN_118
--operation mode is input

dati[4] = INPUT();


--dati[3] is dati[3] at PIN_117
--operation mode is input

dati[3] = INPUT();


--dati[7] is dati[7] at PIN_121
--operation mode is input

dati[7] = INPUT();


--dati[2] is dati[2] at PIN_116
--operation mode is input

dati[2] = INPUT();


--dati[6] is dati[6] at PIN_120
--operation mode is input

dati[6] = INPUT();


--wr is wr at PIN_123
--operation mode is output

wr = OUTPUT(A1L60Q);


--rd is rd at PIN_122
--operation mode is output

rd = OUTPUT(A1L33Q);


--cs is cs at PIN_125
--operation mode is output

cs = OUTPUT(A1L8Q);


--scan[0] is scan[0] at PIN_83
--operation mode is output

scan[0] = OUTPUT(!clkcount[0]);


--scan[1] is scan[1] at PIN_84
--operation mode is output

scan[1] = OUTPUT(clkcount[0]);


--s[6] is s[6] at PIN_184
--operation mode is output

s[6] = OUTPUT(!A1L49);


--s[5] is s[5] at PIN_183
--operation mode is output

s[5] = OUTPUT(!A1L50);


--s[4] is s[4] at PIN_182
--operation mode is output

s[4] = OUTPUT(!A1L51);


--s[3] is s[3] at PIN_181
--operation mode is output

s[3] = OUTPUT(!A1L52);


--s[2] is s[2] at PIN_180
--operation mode is output

s[2] = OUTPUT(A1L53);


--s[1] is s[1] at PIN_179
--operation mode is output

s[1] = OUTPUT(A1L56);


--s[0] is s[0] at PIN_178
--operation mode is output

s[0] = OUTPUT(!A1L58);




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