jsai.vhd

基于北京革新公司出品的EDA实验工具箱的LED扫描显示程序。能够显示8位数字。编译环境为quartusll.5.1版本。fpga芯片为EP18CQ240C6

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.std_logic_arith.all;

entity jsai is
port(SysClk: in std_logic;
     SEG7,SCAN:out std_logic_vector(7 downto 0);
	q:out std_logic
     );
end entity;

architecture a of jsai is
signal count:integer range 0 to 7;
signal fcount:std_logic_vector(7 downto 0);
signal q1:std_logic;


begin

process(sysclk)
begin
if(sysclk'event and sysclk='1')then
      if(fcount="00001111")then    --分频
            fcount<=(others=>'0');
            q1<='1';
      else fcount<=fcount+1;
            q1<='0';
            

      end if;
end if;
end process;

q<=q1;

process(q1)
begin
	if q1'event and q1='1' then
	count<=count+1;
	end if;
end process;

process(count) 
  begin   
case(count) is
      when 0=> SEG7<="00111111";scan<="00000001";--0
      when 1=> SEG7<="00000110";scan<="00000010";--1
      when 2=> SEG7<="01011011";scan<="00000100";--2
      when 3=> SEG7<="01001111";scan<="00001000";--3
      when 4=> SEG7<="01100110";scan<="00010000";--4
      when 5=> SEG7<="01101101";scan<="00100000";--4
      when 6=> SEG7<="01111101";scan<="01000000";--4
      when 7=> SEG7<="00000111";scan<="10000000";--4
      
      when others=>null;
    end case;    
  end process;
end;