alu.map.rpt

ALU可以实现16种操作（包括加减乘除移位运算等）

; 15:1               ; 14 bits   ; 140 LEs       ; 140 LEs              ; 0 LEs                  ; No         ; |ALU|Mux~14                ;
+--------------------+-----------+---------------+----------------------+------------------------+------------+----------------------------+


+---------------------------------------------------------------------------------+
; Parameter Settings for Inferred Entity Instance: lpm_mult:mult_rtl_0            ;
+------------------------------------------------+----------+---------------------+
; Parameter Name                                 ; Value    ; Type                ;
+------------------------------------------------+----------+---------------------+
; AUTO_CARRY_CHAINS                              ; ON       ; AUTO_CARRY          ;
; IGNORE_CARRY_BUFFERS                           ; OFF      ; IGNORE_CARRY        ;
; AUTO_CASCADE_CHAINS                            ; ON       ; AUTO_CASCADE        ;
; IGNORE_CASCADE_BUFFERS                         ; OFF      ; IGNORE_CASCADE      ;
; LPM_WIDTHA                                     ; 8        ; Untyped             ;
; LPM_WIDTHB                                     ; 8        ; Untyped             ;
; LPM_WIDTHP                                     ; 16       ; Untyped             ;
; LPM_WIDTHR                                     ; 16       ; Untyped             ;
; LPM_WIDTHS                                     ; 1        ; Untyped             ;
; LPM_REPRESENTATION                             ; UNSIGNED ; Untyped             ;
; LPM_PIPELINE                                   ; 0        ; Untyped             ;
; LATENCY                                        ; 0        ; Untyped             ;
; INPUT_A_IS_CONSTANT                            ; NO       ; Untyped             ;
; INPUT_B_IS_CONSTANT                            ; NO       ; Untyped             ;
; USE_EAB                                        ; OFF      ; Untyped             ;
; MAXIMIZE_SPEED                                 ; 5        ; Untyped             ;
; DEVICE_FAMILY                                  ; Cyclone  ; Untyped             ;
; CARRY_CHAIN                                    ; MANUAL   ; Untyped             ;
; APEX20K_TECHNOLOGY_MAPPER                      ; Lut      ; TECH_MAPPER_APEX20K ;
; DEDICATED_MULTIPLIER_CIRCUITRY                 ; AUTO     ; Untyped             ;
; DEDICATED_MULTIPLIER_MIN_INPUT_WIDTH_FOR_AUTO  ; 0        ; Untyped             ;
; DEDICATED_MULTIPLIER_MIN_OUTPUT_WIDTH_FOR_AUTO ; 0        ; Untyped             ;
; CBXI_PARAMETER                                 ; NOTHING  ; Untyped             ;
; INPUT_A_FIXED_VALUE                            ; Bx       ; Untyped             ;
; INPUT_B_FIXED_VALUE                            ; Bx       ; Untyped             ;
+------------------------------------------------+----------+---------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------------------------------------+
; lpm_mult Parameter Settings by Entity Instance              ;
+---------------------------------------+---------------------+
; Name                                  ; Value               ;
+---------------------------------------+---------------------+
; Number of entity instances            ; 1                   ;
; Entity Instance                       ; lpm_mult:mult_rtl_0 ;
;     -- LPM_WIDTHA                     ; 8                   ;
;     -- LPM_WIDTHB                     ; 8                   ;
;     -- LPM_WIDTHP                     ; 16                  ;
;     -- LPM_REPRESENTATION             ; UNSIGNED            ;
;     -- INPUT_A_IS_CONSTANT            ; NO                  ;
;     -- INPUT_B_IS_CONSTANT            ; NO                  ;
;     -- USE_EAB                        ; OFF                 ;
;     -- DEDICATED_MULTIPLIER_CIRCUITRY ; AUTO                ;
;     -- INPUT_A_FIXED_VALUE            ; Bx                  ;
;     -- INPUT_B_FIXED_VALUE            ; Bx                  ;
+---------------------------------------+---------------------+


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in F:/Quartus5.0/cyzhangFile/ALU/ALU.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.0 Build 148 04/26/2005 SJ Full Version
    Info: Processing started: Sat May 03 20:32:48 2008
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off ALU -c ALU
Info: Found 2 design units, including 1 entities, in source file reg.vhd
    Info: Found design unit 1: reg-behav
    Info: Found entity 1: reg
Info: Found 2 design units, including 1 entities, in source file ALU.vhd
    Info: Found design unit 1: ALU-behav
    Info: Found entity 1: ALU
Info: Found 2 design units, including 1 entities, in source file ../adder16/add4.vhd
    Info: Found design unit 1: add4-behave
    Info: Found entity 1: add4
Info: Found 2 design units, including 1 entities, in source file ../adder16/adder16.vhd
    Info: Found design unit 1: adder16-behave
    Info: Found entity 1: adder16
Info: Found 2 design units, including 1 entities, in source file ../sub16/sub16.vhd
    Info: Found design unit 1: sub16-behave
    Info: Found entity 1: sub16
Info: Found 2 design units, including 1 entities, in source file ../booth_multiplier/booth_multiplier.vhd
    Info: Found design unit 1: booth_multiplier-structural
    Info: Found entity 1: booth_multiplier
Info: Elaborating entity "ALU" for the top level hierarchy
Warning: VHDL Process Statement warning at ALU.vhd(87): signal "add_temp" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(88): signal "C_tmp1" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(91): signal "sub_temp" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(92): signal "C_tmp2" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(113): signal "cin" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(115): signal "cin" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(126): signal "result_t" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Warning: VHDL Process Statement warning at ALU.vhd(82): signal or variable "result_t" may not be assigned a new value in every possible path through the Process Statement. Signal or variable "result_t" holds its previous value in every path with no new value assignment, which may create a combinational loop in the current design.
Info: Elaborating entity "reg" for hierarchy "reg:A_reg"
Info: Elaborating entity "sub16" for hierarchy "sub16:l2"
Warning: VHDL Process Statement warning at sub16.vhd(36): signal "C_temp" is read inside the Process Statement but isn't in the Process Statement's sensivitity list
Info: Elaborating entity "adder16" for hierarchy "sub16:l2|adder16:l1"
Info: Elaborating entity "add4" for hierarchy "sub16:l2|adder16:l1|add4:u1"
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/lpm_mult.tdf
    Info: Found entity 1: lpm_mult
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/multcore.tdf
    Info: Found entity 1: multcore
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/mpar_add.tdf
    Info: Found entity 1: mpar_add
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Found 1 design units, including 1 entities, in source file ../../software/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Warning: Latch result_t[16] has unsafe behavior
    Warning: Ports D and ENA on the latch are fed by the same signal OP[2]
Info: Implemented 593 device resources after synthesis - the final resource count might be different
    Info: Implemented 25 input pins
    Info: Implemented 18 output pins
    Info: Implemented 550 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 11 warnings
    Info: Processing ended: Sat May 03 20:32:58 2008
    Info: Elapsed time: 00:00:11