port_initial.lst

此程序是GPS定位导航程序

C51 COMPILER V8.02   PORT_INITIAL                                                          05/25/2008 15:06:02 PAGE 1   


C51 COMPILER V8.02, COMPILATION OF MODULE PORT_INITIAL
OBJECT MODULE PLACED IN Port_Initial.OBJ
COMPILER INVOKED BY: C:\Keil\C51\BIN\C51.EXE Port_Initial.c LARGE BROWSE DEBUG OBJECTEXTEND

line level    source

   1          /*****************************************************************/
   2          /*函数名称： Port_Initial.c                                      */
   3          /*函数功能： 主函数,调用各模块                                   */
   4          /*基本思想:  对所涉及到的端口进行配置                            */
   5          /*修改记录： 无修改记录                                          */
   6          /*编写作者： t483-4-19chenyong                                   */
   7          /*编写日期： 2007-4-14                                           */
   8          /*****************************************************************/
   9          
  10          #include "common.h"
*** WARNING C318 IN LINE 15 OF common.h: can't open file 'conio.h'
  11          #include "uart.h"
  12          
  13            
  14          void PORT_Init (void)
  15          {
  16   1         char SFRPAGE_SAVE = SFRPAGE;        // Save Current SFR page
  17   1      
  18   1         SFRPAGE = CONFIG_PAGE;              // Set SFR page
  19   1      
  20   1         XBR0     = 0x04;                    // Enable UART0
  21   1         XBR1     = 0x00;
  22   1         XBR2     = 0x40;                    // Enable crossbar and weak pull-up
  23   1                                             
  24   1      
  25   1         P0MDOUT |= 0x01;                    // Set TX pin to push-pull
  26   1         P1MDOUT |= 0x40;                    // Set P1.6(LED) to push-pull
  27   1      
  28   1         SFRPAGE = SFRPAGE_SAVE;             // Restore SFR page
  29   1      
  30   1      }
  31          
  32           
  33          void OSCILLATOR_Init (void)
  34          {
  35   1         int i;                              // Software timer
  36   1      
  37   1         char SFRPAGE_SAVE = SFRPAGE;        // Save Current SFR page
  38   1      
  39   1         SFRPAGE = CONFIG_PAGE;              // Set SFR page
  40   1      
  41   1         OSCICN = 0x80;                      // Set internal oscillator to run
  42   1                                             // at its slowest frequency
  43   1      
  44   1         CLKSEL = 0x00;                      // Select the internal osc. as
  45   1                                             // the SYSTEMCLOCK source
  46   1      
  47   1         // Initialize external crystal oscillator to use 22.1184 MHz crystal
  48   1      
  49   1         OSCXCN = 0x67;                      // Enable external crystal osc.
  50   1         for (i=0; i < 256; i++);            // Wait at least 1ms
  51   1      
  52   1         while (!(OSCXCN & 0x80));           // Wait for crystal osc to settle
  53   1      
  54   1         SFRPAGE = LEGACY_PAGE;
C51 COMPILER V8.02   PORT_INITIAL                                                          05/25/2008 15:06:02 PAGE 2   

  55   1         FLSCL |=  0x30;                     // Initially set FLASH read timing for
  56   1                                             // 100MHz SYSTEMCLOCK (most conservative
  57   1                                             // setting)
  58   1         if (SYSTEMCLOCK <= 25000000) {           
  59   2         // Set FLASH read timing for <=25MHz
  60   2            FLSCL &= ~0x30;
  61   2         } else if (SYSTEMCLOCK <= 50000000) {    
  62   2         // Set FLASH read timing for <=50MHz
  63   2            FLSCL &= ~0x20;
  64   2         } else if (SYSTEMCLOCK <= 75000000) {    
  65   2         // Set FLASH read timing for <=75MHz
  66   2            FLSCL &= ~0x10;
  67   2         } else {                            // set FLASH read timing for <=100MHz
  68   2            FLSCL &= ~0x00;
  69   2         }
  70   1      
  71   1         // Start PLL for 50MHz operation
  72   1         SFRPAGE = PLL0_PAGE;
  73   1         PLL0CN = 0x04;                      // Select EXTOSC as clk source
  74   1         PLL0CN |= 0x01;                     // Enable PLL power
  75   1         PLL0DIV = 0x04;                     // Divide by 4
  76   1         PLL0FLT &= ~0x0f;
  77   1         PLL0FLT |=  0x0f;                   // Set Loop Filt for (22/4)MHz input clock
  78   1         PLL0FLT &= ~0x30;                   // Set ICO for 30-60MHz
  79   1         PLL0FLT |=  0x10;
  80   1      
  81   1         PLL0MUL = 0x09;                     // Multiply by 9
  82   1      
  83   1         // wait at least 5us
  84   1         for (i = 0; i < 256; i++) ;
  85   1      
  86   1         PLL0CN |= 0x02;                     // Enable PLL
  87   1      
  88   1         while (PLL0CN & 0x10 == 0x00);      // Wait for PLL to lock
  89   1      
  90   1         SFRPAGE = CONFIG_PAGE;
  91   1      
  92   1         CLKSEL = 0x02;                      // Select PLL as SYSTEMCLOCK source
  93   1      
  94   1         SFRPAGE = SFRPAGE_SAVE;             // Restore SFRPAGE
  95   1      }
  96          
  97           


MODULE INFORMATION:   STATIC OVERLAYABLE
   CODE SIZE        =    121    ----
   CONSTANT SIZE    =   ----    ----
   XDATA SIZE       =   ----    ----
   PDATA SIZE       =   ----    ----
   DATA SIZE        =   ----    ----
   IDATA SIZE       =   ----    ----
   BIT SIZE         =   ----    ----
END OF MODULE INFORMATION.


C51 COMPILATION COMPLETE.  1 WARNING(S),  0 ERROR(S)