keys_test.tan.qmsg

4*8矩阵键盘的驱动程序。QuartusII5.0编译通过！

{ "Info" "ITDB_TSU_RESULT" "DEBOUNCING:\\debounuing:U3\|\\debunce:s clr CLK_4M 3.531 ns register " "Info: tsu for register \"DEBOUNCING:\\debounuing:U3\|\\debunce:s\" (data pin = \"clr\", clock pin = \"CLK_4M\") is 3.531 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "12.483 ns + Longest pin register " "Info: + Longest pin to register delay is 12.483 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns clr 1 PIN PIN_13 23 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_13; Fanout = 23; PIN Node = 'clr'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "" { clr } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(8.293 ns) + CELL(0.590 ns) 10.352 ns DEBOUNCING:\\debounuing:U4\|\\debunce:r~0 2 COMB LC_X25_Y20_N6 16 " "Info: 2: + IC(8.293 ns) + CELL(0.590 ns) = 10.352 ns; Loc. = LC_X25_Y20_N6; Fanout = 16; COMB Node = 'DEBOUNCING:\\debounuing:U4\|\\debunce:r~0'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.883 ns" { clr DEBOUNCING:\debounuing:U4|\debunce:r~0 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.264 ns) + CELL(0.867 ns) 12.483 ns DEBOUNCING:\\debounuing:U3\|\\debunce:s 3 REG LC_X24_Y21_N6 1 " "Info: 3: + IC(1.264 ns) + CELL(0.867 ns) = 12.483 ns; Loc. = LC_X24_Y21_N6; Fanout = 1; REG Node = 'DEBOUNCING:\\debounuing:U3\|\\debunce:s'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "2.131 ns" { DEBOUNCING:\debounuing:U4|\debunce:r~0 DEBOUNCING:\debounuing:U3|\debunce:s } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.926 ns ( 23.44 % ) " "Info: Total cell delay = 2.926 ns ( 23.44 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "9.557 ns ( 76.56 % ) " "Info: Total interconnect delay = 9.557 ns ( 76.56 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "12.483 ns" { clr DEBOUNCING:\debounuing:U4|\debunce:r~0 DEBOUNCING:\debounuing:U3|\debunce:s } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "12.483 ns" { clr clr~out0 DEBOUNCING:\debounuing:U4|\debunce:r~0 DEBOUNCING:\debounuing:U3|\debunce:s } { 0.000ns 0.000ns 8.293ns 1.264ns } { 0.000ns 1.469ns 0.590ns 0.867ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } {  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_4M destination 8.989 ns - Shortest register " "Info: - Shortest clock path from clock \"CLK_4M\" to destination register is 8.989 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK_4M 1 CLK PIN_28 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 7; CLK Node = 'CLK_4M'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "" { CLK_4M } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.935 ns) 3.469 ns \\counter:Q\[0\] 2 REG LC_X16_Y17_N1 29 " "Info: 2: + IC(1.065 ns) + CELL(0.935 ns) = 3.469 ns; Loc. = LC_X16_Y17_N1; Fanout = 29; REG Node = '\\counter:Q\[0\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "2.000 ns" { CLK_4M \counter:Q[0] } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.809 ns) + CELL(0.711 ns) 8.989 ns DEBOUNCING:\\debounuing:U3\|\\debunce:s 3 REG LC_X24_Y21_N6 1 " "Info: 3: + IC(4.809 ns) + CELL(0.711 ns) = 8.989 ns; Loc. = LC_X24_Y21_N6; Fanout = 1; REG Node = 'DEBOUNCING:\\debounuing:U3\|\\debunce:s'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "5.520 ns" { \counter:Q[0] DEBOUNCING:\debounuing:U3|\debunce:s } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 34.65 % ) " "Info: Total cell delay = 3.115 ns ( 34.65 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.874 ns ( 65.35 % ) " "Info: Total interconnect delay = 5.874 ns ( 65.35 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.989 ns" { CLK_4M \counter:Q[0] DEBOUNCING:\debounuing:U3|\debunce:s } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "8.989 ns" { CLK_4M CLK_4M~out0 \counter:Q[0] DEBOUNCING:\debounuing:U3|\debunce:s } { 0.000ns 0.000ns 1.065ns 4.809ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "12.483 ns" { clr DEBOUNCING:\debounuing:U4|\debunce:r~0 DEBOUNCING:\debounuing:U3|\debunce:s } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "12.483 ns" { clr clr~out0 DEBOUNCING:\debounuing:U4|\debunce:r~0 DEBOUNCING:\debounuing:U3|\debunce:s } { 0.000ns 0.000ns 8.293ns 1.264ns } { 0.000ns 1.469ns 0.590ns 0.867ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.989 ns" { CLK_4M \counter:Q[0] DEBOUNCING:\debounuing:U3|\debunce:s } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "8.989 ns" { CLK_4M CLK_4M~out0 \counter:Q[0] DEBOUNCING:\debounuing:U3|\debunce:s } { 0.000ns 0.000ns 1.065ns 4.809ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLK_4M SEGOUT\[3\] \\key_decoder:ZOUT\[0\] 18.898 ns register " "Info: tco from clock \"CLK_4M\" to destination pin \"SEGOUT\[3\]\" through register \"\\key_decoder:ZOUT\[0\]\" is 18.898 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_4M source 9.268 ns + Longest register " "Info: + Longest clock path from clock \"CLK_4M\" to source register is 9.268 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK_4M 1 CLK PIN_28 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 7; CLK Node = 'CLK_4M'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "" { CLK_4M } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.935 ns) 3.469 ns \\counter:Q\[2\] 2 REG LC_X16_Y17_N3 8 " "Info: 2: + IC(1.065 ns) + CELL(0.935 ns) = 3.469 ns; Loc. = LC_X16_Y17_N3; Fanout = 8; REG Node = '\\counter:Q\[2\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "2.000 ns" { CLK_4M \counter:Q[2] } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(5.088 ns) + CELL(0.711 ns) 9.268 ns \\key_decoder:ZOUT\[0\] 3 REG LC_X16_Y17_N8 2 " "Info: 3: + IC(5.088 ns) + CELL(0.711 ns) = 9.268 ns; Loc. = LC_X16_Y17_N8; Fanout = 2; REG Node = '\\key_decoder:ZOUT\[0\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "5.799 ns" { \counter:Q[2] \key_decoder:ZOUT[0] } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 33.61 % ) " "Info: Total cell delay = 3.115 ns ( 33.61 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.153 ns ( 66.39 % ) " "Info: Total interconnect delay = 6.153 ns ( 66.39 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "9.268 ns" { CLK_4M \counter:Q[2] \key_decoder:ZOUT[0] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.268 ns" { CLK_4M CLK_4M~out0 \counter:Q[2] \key_decoder:ZOUT[0] } { 0.000ns 0.000ns 1.065ns 5.088ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } {  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.406 ns + Longest register pin " "Info: + Longest register to pin delay is 9.406 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns \\key_decoder:ZOUT\[0\] 1 REG LC_X16_Y17_N8 2 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X16_Y17_N8; Fanout = 2; REG Node = '\\key_decoder:ZOUT\[0\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "" { \key_decoder:ZOUT[0] } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.999 ns) + CELL(0.114 ns) 2.113 ns DB\[0\]~166 2 COMB LC_X23_Y19_N3 10 " "Info: 2: + IC(1.999 ns) + CELL(0.114 ns) = 2.113 ns; Loc. = LC_X23_Y19_N3; Fanout = 10; COMB Node = 'DB\[0\]~166'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "2.113 ns" { \key_decoder:ZOUT[0] DB[0]~166 } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 33 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.317 ns) + CELL(0.114 ns) 3.544 ns SEG~1032 3 COMB LC_X23_Y18_N6 1 " "Info: 3: + IC(1.317 ns) + CELL(0.114 ns) = 3.544 ns; Loc. = LC_X23_Y18_N6; Fanout = 1; COMB Node = 'SEG~1032'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "1.431 ns" { DB[0]~166 SEG~1032 } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.271 ns) + CELL(0.292 ns) 5.107 ns SEG~1033 4 COMB LC_X23_Y19_N9 1 " "Info: 4: + IC(1.271 ns) + CELL(0.292 ns) = 5.107 ns; Loc. = LC_X23_Y19_N9; Fanout = 1; COMB Node = 'SEG~1033'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "1.563 ns" { SEG~1032 SEG~1033 } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 34 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.191 ns) + CELL(2.108 ns) 9.406 ns SEGOUT\[3\] 5 PIN PIN_207 0 " "Info: 5: + IC(2.191 ns) + CELL(2.108 ns) = 9.406 ns; Loc. = PIN_207; Fanout = 0; PIN Node = 'SEGOUT\[3\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "4.299 ns" { SEG~1033 SEGOUT[3] } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 16 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.628 ns ( 27.94 % ) " "Info: Total cell delay = 2.628 ns ( 27.94 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.778 ns ( 72.06 % ) " "Info: Total interconnect delay = 6.778 ns ( 72.06 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "9.406 ns" { \key_decoder:ZOUT[0] DB[0]~166 SEG~1032 SEG~1033 SEGOUT[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.406 ns" { \key_decoder:ZOUT[0] DB[0]~166 SEG~1032 SEG~1033 SEGOUT[3] } { 0.000ns 1.999ns 1.317ns 1.271ns 2.191ns } { 0.000ns 0.114ns 0.114ns 0.292ns 2.108ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "9.268 ns" { CLK_4M \counter:Q[2] \key_decoder:ZOUT[0] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.268 ns" { CLK_4M CLK_4M~out0 \counter:Q[2] \key_decoder:ZOUT[0] } { 0.000ns 0.000ns 1.065ns 5.088ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "9.406 ns" { \key_decoder:ZOUT[0] DB[0]~166 SEG~1032 SEG~1033 SEGOUT[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.406 ns" { \key_decoder:ZOUT[0] DB[0]~166 SEG~1032 SEG~1033 SEGOUT[3] } { 0.000ns 1.999ns 1.317ns 1.271ns 2.191ns } { 0.000ns 0.114ns 0.114ns 0.292ns 2.108ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}
{ "Info" "ITDB_TH_RESULT" "DEBOUNCING:\\debounuing:U4\|\\debunce:d0 KEY\[3\] CLK_4M 0.573 ns register " "Info: th for register \"DEBOUNCING:\\debounuing:U4\|\\debunce:d0\" (data pin = \"KEY\[3\]\", clock pin = \"CLK_4M\") is 0.573 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLK_4M destination 8.989 ns + Longest register " "Info: + Longest clock path from clock \"CLK_4M\" to destination register is 8.989 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns CLK_4M 1 CLK PIN_28 7 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_28; Fanout = 7; CLK Node = 'CLK_4M'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "" { CLK_4M } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 12 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.065 ns) + CELL(0.935 ns) 3.469 ns \\counter:Q\[0\] 2 REG LC_X16_Y17_N1 29 " "Info: 2: + IC(1.065 ns) + CELL(0.935 ns) = 3.469 ns; Loc. = LC_X16_Y17_N1; Fanout = 29; REG Node = '\\counter:Q\[0\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "2.000 ns" { CLK_4M \counter:Q[0] } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.809 ns) + CELL(0.711 ns) 8.989 ns DEBOUNCING:\\debounuing:U4\|\\debunce:d0 3 REG LC_X24_Y21_N5 3 " "Info: 3: + IC(4.809 ns) + CELL(0.711 ns) = 8.989 ns; Loc. = LC_X24_Y21_N5; Fanout = 3; REG Node = 'DEBOUNCING:\\debounuing:U4\|\\debunce:d0'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "5.520 ns" { \counter:Q[0] DEBOUNCING:\debounuing:U4|\debunce:d0 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.115 ns ( 34.65 % ) " "Info: Total cell delay = 3.115 ns ( 34.65 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.874 ns ( 65.35 % ) " "Info: Total interconnect delay = 5.874 ns ( 65.35 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.989 ns" { CLK_4M \counter:Q[0] DEBOUNCING:\debounuing:U4|\debunce:d0 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "8.989 ns" { CLK_4M CLK_4M~out0 \counter:Q[0] DEBOUNCING:\debounuing:U4|\debunce:d0 } { 0.000ns 0.000ns 1.065ns 4.809ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "0.015 ns + " "Info: + Micro hold delay of destination is 0.015 ns" {  } {  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.431 ns - Shortest pin register " "Info: - Shortest pin to register delay is 8.431 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns KEY\[3\] 1 PIN PIN_18 1 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_18; Fanout = 1; PIN Node = 'KEY\[3\]'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "" { KEY[3] } "NODE_NAME" } "" } } { "keys_test.vhd" "" { Text "G:/EDAV new/test_50/keys_test.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.653 ns) + CELL(0.309 ns) 8.431 ns DEBOUNCING:\\debounuing:U4\|\\debunce:d0 2 REG LC_X24_Y21_N5 3 " "Info: 2: + IC(6.653 ns) + CELL(0.309 ns) = 8.431 ns; Loc. = LC_X24_Y21_N5; Fanout = 3; REG Node = 'DEBOUNCING:\\debounuing:U4\|\\debunce:d0'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "6.962 ns" { KEY[3] DEBOUNCING:\debounuing:U4|\debunce:d0 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.778 ns ( 21.09 % ) " "Info: Total cell delay = 1.778 ns ( 21.09 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.653 ns ( 78.91 % ) " "Info: Total interconnect delay = 6.653 ns ( 78.91 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.431 ns" { KEY[3] DEBOUNCING:\debounuing:U4|\debunce:d0 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "8.431 ns" { KEY[3] KEY[3]~out0 DEBOUNCING:\debounuing:U4|\debunce:d0 } { 0.000ns 0.000ns 6.653ns } { 0.000ns 1.469ns 0.309ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.989 ns" { CLK_4M \counter:Q[0] DEBOUNCING:\debounuing:U4|\debunce:d0 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "8.989 ns" { CLK_4M CLK_4M~out0 \counter:Q[0] DEBOUNCING:\debounuing:U4|\debunce:d0 } { 0.000ns 0.000ns 1.065ns 4.809ns } { 0.000ns 1.469ns 0.935ns 0.711ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "keys_test" "UNKNOWN" "V1" "G:/EDAV new/test_50/db/keys_test.quartus_db" { Floorplan "G:/EDAV new/test_50/" "" "8.431 ns" { KEY[3] DEBOUNCING:\debounuing:U4|\debunce:d0 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "8.431 ns" { KEY[3] KEY[3]~out0 DEBOUNCING:\debounuing:U4|\debunce:d0 } { 0.000ns 0.000ns 6.653ns } { 0.000ns 1.469ns 0.309ns } } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 3 s Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 3 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Jun 28 15:17:08 2006 " "Info: Processing ended: Wed Jun 28 15:17:08 2006" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:04 " "Info: Elapsed time: 00:00:04" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}