dds_cordic.tan.qmsg

dds频率生成文件

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Timing Analyzer Quartus II " "Info: Running Quartus II Timing Analyzer" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Wed Dec 05 22:24:08 2007 " "Info: Processing started: Wed Dec 05 22:24:08 2007" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_tan --read_settings_files=off --write_settings_files=off DDS_CORDIC -c DDS_CORDIC --timing_analysis_only " "Info: Command: quartus_tan --read_settings_files=off --write_settings_files=off DDS_CORDIC -c DDS_CORDIC --timing_analysis_only" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "sys_clk " "Info: Assuming node \"sys_clk\" is an undefined clock" {  } { { "DDS_CORDIC.bdf" "" { Schematic "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/DDS_CORDIC.bdf" { { 136 32 200 152 "sys_clk" "" } } } } { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "sys_clk" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "sys_clk register cordic_m1_rot:inst\|z\[6\]\[3\] register cordic_m1_rot:inst\|z\[7\]\[10\] 169.18 MHz 5.911 ns Internal " "Info: Clock \"sys_clk\" has Internal fmax of 169.18 MHz between source register \"cordic_m1_rot:inst\|z\[6\]\[3\]\" and destination register \"cordic_m1_rot:inst\|z\[7\]\[10\]\" (period= 5.911 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.647 ns + Longest register register " "Info: + Longest register to register delay is 5.647 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cordic_m1_rot:inst\|z\[6\]\[3\] 1 REG LCFF_X23_Y13_N5 4 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X23_Y13_N5; Fanout = 4; REG Node = 'cordic_m1_rot:inst\|z\[6\]\[3\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { cordic_m1_rot:inst|z[6][3] } "NODE_NAME" } } { "cordic_m1_rot.vhd" "" { Text "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/cordic_m1_rot.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.521 ns) + CELL(0.621 ns) 2.142 ns cordic_m1_rot:inst\|Add55~195 2 COMB LCCOMB_X22_Y14_N2 2 " "Info: 2: + IC(1.521 ns) + CELL(0.621 ns) = 2.142 ns; Loc. = LCCOMB_X22_Y14_N2; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~195'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.142 ns" { cordic_m1_rot:inst|z[6][3] cordic_m1_rot:inst|Add55~195 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.228 ns cordic_m1_rot:inst\|Add55~197 3 COMB LCCOMB_X22_Y14_N4 2 " "Info: 3: + IC(0.000 ns) + CELL(0.086 ns) = 2.228 ns; Loc. = LCCOMB_X22_Y14_N4; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~197'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.086 ns" { cordic_m1_rot:inst|Add55~195 cordic_m1_rot:inst|Add55~197 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.314 ns cordic_m1_rot:inst\|Add55~199 4 COMB LCCOMB_X22_Y14_N6 2 " "Info: 4: + IC(0.000 ns) + CELL(0.086 ns) = 2.314 ns; Loc. = LCCOMB_X22_Y14_N6; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~199'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.086 ns" { cordic_m1_rot:inst|Add55~197 cordic_m1_rot:inst|Add55~199 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.400 ns cordic_m1_rot:inst\|Add55~201 5 COMB LCCOMB_X22_Y14_N8 2 " "Info: 5: + IC(0.000 ns) + CELL(0.086 ns) = 2.400 ns; Loc. = LCCOMB_X22_Y14_N8; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~201'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.086 ns" { cordic_m1_rot:inst|Add55~199 cordic_m1_rot:inst|Add55~201 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.486 ns cordic_m1_rot:inst\|Add55~203 6 COMB LCCOMB_X22_Y14_N10 2 " "Info: 6: + IC(0.000 ns) + CELL(0.086 ns) = 2.486 ns; Loc. = LCCOMB_X22_Y14_N10; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~203'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.086 ns" { cordic_m1_rot:inst|Add55~201 cordic_m1_rot:inst|Add55~203 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.086 ns) 2.572 ns cordic_m1_rot:inst\|Add55~205 7 COMB LCCOMB_X22_Y14_N12 2 " "Info: 7: + IC(0.000 ns) + CELL(0.086 ns) = 2.572 ns; Loc. = LCCOMB_X22_Y14_N12; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~205'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.086 ns" { cordic_m1_rot:inst|Add55~203 cordic_m1_rot:inst|Add55~205 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.190 ns) 2.762 ns cordic_m1_rot:inst\|Add55~207 8 COMB LCCOMB_X22_Y14_N14 2 " "Info: 8: + IC(0.000 ns) + CELL(0.190 ns) = 2.762 ns; Loc. = LCCOMB_X22_Y14_N14; Fanout = 2; COMB Node = 'cordic_m1_rot:inst\|Add55~207'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.190 ns" { cordic_m1_rot:inst|Add55~205 cordic_m1_rot:inst|Add55~207 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.506 ns) 3.268 ns cordic_m1_rot:inst\|Add55~208 9 COMB LCCOMB_X22_Y14_N16 1 " "Info: 9: + IC(0.000 ns) + CELL(0.506 ns) = 3.268 ns; Loc. = LCCOMB_X22_Y14_N16; Fanout = 1; COMB Node = 'cordic_m1_rot:inst\|Add55~208'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.506 ns" { cordic_m1_rot:inst|Add55~207 cordic_m1_rot:inst|Add55~208 } "NODE_NAME" } } { "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" "" { Text "d:/altera/quartus60/libraries/vhdl/synopsys/syn_arit.vhd" 781 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.919 ns) + CELL(0.460 ns) 5.647 ns cordic_m1_rot:inst\|z\[7\]\[10\] 10 REG LCFF_X23_Y14_N21 4 " "Info: 10: + IC(1.919 ns) + CELL(0.460 ns) = 5.647 ns; Loc. = LCFF_X23_Y14_N21; Fanout = 4; REG Node = 'cordic_m1_rot:inst\|z\[7\]\[10\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "2.379 ns" { cordic_m1_rot:inst|Add55~208 cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "cordic_m1_rot.vhd" "" { Text "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/cordic_m1_rot.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.207 ns ( 39.08 % ) " "Info: Total cell delay = 2.207 ns ( 39.08 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.440 ns ( 60.92 % ) " "Info: Total interconnect delay = 3.440 ns ( 60.92 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.647 ns" { cordic_m1_rot:inst|z[6][3] cordic_m1_rot:inst|Add55~195 cordic_m1_rot:inst|Add55~197 cordic_m1_rot:inst|Add55~199 cordic_m1_rot:inst|Add55~201 cordic_m1_rot:inst|Add55~203 cordic_m1_rot:inst|Add55~205 cordic_m1_rot:inst|Add55~207 cordic_m1_rot:inst|Add55~208 cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "5.647 ns" { cordic_m1_rot:inst|z[6][3] cordic_m1_rot:inst|Add55~195 cordic_m1_rot:inst|Add55~197 cordic_m1_rot:inst|Add55~199 cordic_m1_rot:inst|Add55~201 cordic_m1_rot:inst|Add55~203 cordic_m1_rot:inst|Add55~205 cordic_m1_rot:inst|Add55~207 cordic_m1_rot:inst|Add55~208 cordic_m1_rot:inst|z[7][10] } { 0.000ns 1.521ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.919ns } { 0.000ns 0.621ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.506ns 0.460ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_clk destination 3.146 ns + Shortest register " "Info: + Shortest clock path from clock \"sys_clk\" to destination register is 3.146 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.150 ns) 1.150 ns sys_clk 1 CLK PIN_209 2 " "Info: 1: + IC(0.000 ns) + CELL(1.150 ns) = 1.150 ns; Loc. = PIN_209; Fanout = 2; CLK Node = 'sys_clk'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sys_clk } "NODE_NAME" } } { "DDS_CORDIC.bdf" "" { Schematic "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/DDS_CORDIC.bdf" { { 136 32 200 152 "sys_clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.257 ns) + CELL(0.000 ns) 1.407 ns sys_clk~clkctrl 2 COMB CLKCTRL_G10 589 " "Info: 2: + IC(0.257 ns) + CELL(0.000 ns) = 1.407 ns; Loc. = CLKCTRL_G10; Fanout = 589; COMB Node = 'sys_clk~clkctrl'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.257 ns" { sys_clk sys_clk~clkctrl } "NODE_NAME" } } { "DDS_CORDIC.bdf" "" { Schematic "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/DDS_CORDIC.bdf" { { 136 32 200 152 "sys_clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.666 ns) 3.146 ns cordic_m1_rot:inst\|z\[7\]\[10\] 3 REG LCFF_X23_Y14_N21 4 " "Info: 3: + IC(1.073 ns) + CELL(0.666 ns) = 3.146 ns; Loc. = LCFF_X23_Y14_N21; Fanout = 4; REG Node = 'cordic_m1_rot:inst\|z\[7\]\[10\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.739 ns" { sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "cordic_m1_rot.vhd" "" { Text "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/cordic_m1_rot.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.816 ns ( 57.72 % ) " "Info: Total cell delay = 1.816 ns ( 57.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.330 ns ( 42.28 % ) " "Info: Total interconnect delay = 1.330 ns ( 42.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.146 ns" { sys_clk sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.146 ns" { sys_clk sys_clk~combout sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } { 0.000ns 0.000ns 0.257ns 1.073ns } { 0.000ns 1.150ns 0.000ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "sys_clk source 3.146 ns - Longest register " "Info: - Longest clock path from clock \"sys_clk\" to source register is 3.146 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.150 ns) 1.150 ns sys_clk 1 CLK PIN_209 2 " "Info: 1: + IC(0.000 ns) + CELL(1.150 ns) = 1.150 ns; Loc. = PIN_209; Fanout = 2; CLK Node = 'sys_clk'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { sys_clk } "NODE_NAME" } } { "DDS_CORDIC.bdf" "" { Schematic "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/DDS_CORDIC.bdf" { { 136 32 200 152 "sys_clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.257 ns) + CELL(0.000 ns) 1.407 ns sys_clk~clkctrl 2 COMB CLKCTRL_G10 589 " "Info: 2: + IC(0.257 ns) + CELL(0.000 ns) = 1.407 ns; Loc. = CLKCTRL_G10; Fanout = 589; COMB Node = 'sys_clk~clkctrl'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "0.257 ns" { sys_clk sys_clk~clkctrl } "NODE_NAME" } } { "DDS_CORDIC.bdf" "" { Schematic "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/DDS_CORDIC.bdf" { { 136 32 200 152 "sys_clk" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.073 ns) + CELL(0.666 ns) 3.146 ns cordic_m1_rot:inst\|z\[6\]\[3\] 3 REG LCFF_X23_Y13_N5 4 " "Info: 3: + IC(1.073 ns) + CELL(0.666 ns) = 3.146 ns; Loc. = LCFF_X23_Y13_N5; Fanout = 4; REG Node = 'cordic_m1_rot:inst\|z\[6\]\[3\]'" {  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "1.739 ns" { sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } "NODE_NAME" } } { "cordic_m1_rot.vhd" "" { Text "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/cordic_m1_rot.vhd" 56 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.816 ns ( 57.72 % ) " "Info: Total cell delay = 1.816 ns ( 57.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.330 ns ( 42.28 % ) " "Info: Total interconnect delay = 1.330 ns ( 42.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.146 ns" { sys_clk sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.146 ns" { sys_clk sys_clk~combout sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } { 0.000ns 0.000ns 0.257ns 1.073ns } { 0.000ns 1.150ns 0.000ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.146 ns" { sys_clk sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.146 ns" { sys_clk sys_clk~combout sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } { 0.000ns 0.000ns 0.257ns 1.073ns } { 0.000ns 1.150ns 0.000ns 0.666ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.146 ns" { sys_clk sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.146 ns" { sys_clk sys_clk~combout sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } { 0.000ns 0.000ns 0.257ns 1.073ns } { 0.000ns 1.150ns 0.000ns 0.666ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "cordic_m1_rot.vhd" "" { Text "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/cordic_m1_rot.vhd" 56 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "cordic_m1_rot.vhd" "" { Text "C:/Documents and Settings/Administrator.8F9C194BD37D4C4/桌面/CORDIC_DDS_16bit/cordic_m1_rot.vhd" 56 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "5.647 ns" { cordic_m1_rot:inst|z[6][3] cordic_m1_rot:inst|Add55~195 cordic_m1_rot:inst|Add55~197 cordic_m1_rot:inst|Add55~199 cordic_m1_rot:inst|Add55~201 cordic_m1_rot:inst|Add55~203 cordic_m1_rot:inst|Add55~205 cordic_m1_rot:inst|Add55~207 cordic_m1_rot:inst|Add55~208 cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "5.647 ns" { cordic_m1_rot:inst|z[6][3] cordic_m1_rot:inst|Add55~195 cordic_m1_rot:inst|Add55~197 cordic_m1_rot:inst|Add55~199 cordic_m1_rot:inst|Add55~201 cordic_m1_rot:inst|Add55~203 cordic_m1_rot:inst|Add55~205 cordic_m1_rot:inst|Add55~207 cordic_m1_rot:inst|Add55~208 cordic_m1_rot:inst|z[7][10] } { 0.000ns 1.521ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 0.000ns 1.919ns } { 0.000ns 0.621ns 0.086ns 0.086ns 0.086ns 0.086ns 0.086ns 0.190ns 0.506ns 0.460ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.146 ns" { sys_clk sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.146 ns" { sys_clk sys_clk~combout sys_clk~clkctrl cordic_m1_rot:inst|z[7][10] } { 0.000ns 0.000ns 0.257ns 1.073ns } { 0.000ns 1.150ns 0.000ns 0.666ns } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "3.146 ns" { sys_clk sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } "NODE_NAME" } } { "d:/altera/quartus60/win/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus60/win/Technology_Viewer.qrui" "3.146 ns" { sys_clk sys_clk~combout sys_clk~clkctrl cordic_m1_rot:inst|z[6][3] } { 0.000ns 0.000ns 0.257ns 1.073ns } { 0.000ns 1.150ns 0.000ns 0.666ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}