pwmlo.vhd

来自「这个是国外大学的项目代码」· VHDL 代码 · 共 67 行

------------------------------------------------------------------------
--  pwmlo.vhd -- Pulse Width Modulator
------------------------------------------------------------------------
--  Author : Kovacs Laszlo - Attila 
------------------------------------------------------------------------
-- Software version: Xilinx ISE 7.1.04i
--                   WebPack
------------------------------------------------------------------------
-- This Pulse Width Modulator according to the 5 most significant bits 
-- of the data input selects one of the 17 logics (pulse widths)), 
-- giving more contrast for the smaller values.
------------------------------------------------------------------------

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity pwmlo is
    Port ( CLK2X : in std_logic;
           CLK   : in std_logic;
           CLK2  : in std_logic;
           CLK4  : in std_logic;
           DO    : out std_logic;
           DI    : in std_logic_vector(7 downto 0));
end pwmlo;

architecture Behavioral of pwmlo is

begin

    with DI(7 downto 3) select
    DO <= '1'                             when "11111", --16
        '1'                               when "11110", --16
        '1'                               when "11101", --16
        '1'                               when "11100", --16
        '1'                               when "11011", --16
        CLK4 or CLK2 or CLK or CLK2X      when "11010", --15
        CLK4 or CLK2 or CLK or CLK2X      when "11001", --15
        CLK4 or CLK2 or CLK or CLK2X      when "11000", --15
        CLK4 or CLK2 or CLK or CLK2X      when "10111", --15
        CLK4 or CLK2 or CLK               when "10110", --14
        CLK4 or CLK2 or CLK               when "10101", --14
        CLK4 or CLK2 or CLK               when "10100", --14
        CLK4 or CLK2 or (CLK and CLK2X)   when "10011", --13
        CLK4 or CLK2 or (CLK and CLK2X)   when "10010", --13
        CLK4 or CLK2 or (CLK and CLK2X)   when "10001", --13
        CLK4 or CLK2                      when "10000", --12
        CLK4 or CLK2                      when "01111", --12
        CLK4 or (CLK2 and (CLK or CLK2X)) when "01110", --11
        CLK4 or (CLK2 and (CLK or CLK2X)) when "01101", --11
        CLK4 or (CLK2 and CLK)            when "01100", --10
        CLK4 or (CLK2 and CLK)            when "01011", --10
        CLK4 or (CLK2 and CLK and CLK2X)  when "01010", --09
        CLK4 or (CLK2 and CLK and CLK2X)  when "01001", --09
        CLK4                              when "01000", --08
        CLK4 and (CLK2 or CLK or CLK2X)   when "00111", --07
        CLK4 and (CLK2 or CLK)            when "00110", --06
        CLK4 and (CLK2 or (CLK and CLK2X))when "00101", --05
        CLK4 and CLK2                     when "00100", --04
        CLK4 and CLK2 and (CLK or CLK2X)  when "00011", --03
        CLK4 and CLK2 and CLK             when "00010", --02
        CLK4 and CLK2 and CLK and CLK2X   when "00001", --01
        '0' when others;

end Behavioral;