maxmin.tan.summary

一个自己编写的这次2008北京市电子竞赛VHDL源程序

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 0.756 ns
From           : D[1]
To             : ADC0820:inst|Q[1]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 17.970 ns
From           : display1:inst3|segpp[0]
To             : segoutpp[0]
From Clock     : clk
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : 1.001 ns
From           : D[3]
To             : ADC0820:inst|Q[3]
From Clock     : --
To Clock       : clk
Failed Paths   : 0

Type           : Clock Setup: 'clk'
Slack          : N/A
Required Time  : None
Actual Time    : 22.27 MHz ( period = 44.894 ns )
From           : calculate:inst2|min[3]
To             : display1:inst3|segpp[3]
From Clock     : clk
To Clock       : clk
Failed Paths   : 0

Type           : Clock Hold: 'clk'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : ADC0820:inst|current_state.st4
To             : ADC0820:inst|current_state_12
From Clock     : clk
To Clock       : clk
Failed Paths   : 6

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 6

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