maxmin.map.eqn

一个自己编写的这次2008北京市电子竞赛VHDL源程序

--K1L59 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[96]~2636
--operation mode is normal

K1L59 = !U1L2 & (K1L41 # U6L6 & U6L11);


--U1L9 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~109
--operation mode is arithmetic

U1L9_carry_eqn = U1L6;
U1L9 = U1L9_carry_eqn $ (K1L41 # K1L40);

--U1L10 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~111
--operation mode is arithmetic

U1L10 = CARRY(!K1L41 & !K1L40 # !U1L6);


--K1L76 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[106]~2637
--operation mode is normal

K1L76 = !U2L2 & (K1L59 # U1L2 & U1L9);


--K1L75 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[106]~46
--operation mode is normal

K1L75 = U2L2 & U2L7;


--K1L39 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[85]~2638
--operation mode is normal

K1L39 = !U6L6 & (K1L22 # U5L4 & U5L5);


--K1L38 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[85]~85
--operation mode is normal

K1L38 = U6L6 & U6L4;


--U1L11 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~114
--operation mode is arithmetic

U1L11_carry_eqn = U1L14;
U1L11 = U1L11_carry_eqn $ (K1L37 # K1L36);

--U1L12 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~116
--operation mode is arithmetic

U1L12 = CARRY(!K1L37 & !K1L36 # !U1L14);


--U6L13 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_9|add_sub_cella[1]~114
--operation mode is arithmetic

U6L13_carry_eqn = U6L18;
U6L13 = U6L13_carry_eqn $ (!K1L20 & !K1L19);

--U6L14 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_9|add_sub_cella[1]~116
--operation mode is arithmetic

U6L14 = CARRY(!U6L18 & (K1L20 # K1L19));


--T1L15 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~108
--operation mode is arithmetic

T1L15 = EB2L9 $ T1L19;

--T1L16 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~110
--operation mode is arithmetic

T1L16 = CARRY(EB2L9 & T1L19);


--C1_max[7] is calculate:inst2|max[7]
--operation mode is normal

C1_max[7]_lut_out = GND;
C1_max[7] = DFFEAS(C1_max[7]_lut_out, C1_clko, en, , , C1_buffmax[7], C1L62, , );


--C1_max[4] is calculate:inst2|max[4]
--operation mode is normal

C1_max[4]_lut_out = GND;
C1_max[4] = DFFEAS(C1_max[4]_lut_out, C1_clko, en, , , C1_buffmax[4], C1L62, , );


--AB1L7 is display1:inst3|lpm_mult:mult_rtl_0|multcore:mult_core|romout[1][4]~1404
--operation mode is normal

AB1L7 = C1_max[7] $ C1_max[4];


--C1_max[1] is calculate:inst2|max[1]
--operation mode is arithmetic

C1_max[1]_lut_out = GND;
C1_max[1] = DFFEAS(C1_max[1]_lut_out, C1_clko, en, , , C1_buffmax[1], C1L62, , );

--U2L1 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[0]~COUT
--operation mode is arithmetic

U2L1 = CARRY(C1_max[1]);


--C1_max[0] is calculate:inst2|max[0]
--operation mode is arithmetic

C1_max[0]_lut_out = GND;
C1_max[0] = DFFEAS(C1_max[0]_lut_out, C1_clko, en, , , C1_buffmax[0], C1L62, , );

--U3L1 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[0]~COUT
--operation mode is arithmetic

U3L1 = CARRY(C1_max[0]);


--C1_max[2] is calculate:inst2|max[2]
--operation mode is arithmetic

C1_max[2]_lut_out = GND;
C1_max[2] = DFFEAS(C1_max[2]_lut_out, C1_clko, en, , , C1_buffmax[2], C1L62, , );

--U1L1 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[0]~COUT
--operation mode is arithmetic

U1L1 = CARRY(C1_max[2]);


--C1_max[3] is calculate:inst2|max[3]
--operation mode is normal

C1_max[3]_lut_out = GND;
C1_max[3] = DFFEAS(C1_max[3]_lut_out, C1_clko, en, , , C1_buffmax[3], C1L62, , );


--AB1L4 is display1:inst3|lpm_mult:mult_rtl_0|multcore:mult_core|romout[0][8]~1405
--operation mode is normal

AB1L4 = C1_max[2] & C1_max[1] & (!C1_max[3]) # !C1_max[2] & C1_max[3] & (!C1_max[0] # !C1_max[1]);


--EB2L9 is display1:inst3|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~102
--operation mode is arithmetic

EB2L9_carry_eqn = EB2L13;
EB2L9 = C1_max[6] $ AB1L3 $ !EB2L9_carry_eqn;

--EB2L10 is display1:inst3|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~104
--operation mode is arithmetic

EB2L10 = CARRY(C1_max[6] & (AB1L3 # !EB2L13) # !C1_max[6] & AB1L3 & !EB2L13);


--U5L14 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_8|add_sub_cella[1]~115
--operation mode is arithmetic

U5L14 = CARRY(!K1L14 & !K1L15 & !U5L18);


--K1L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[65]~114
--operation mode is normal

K1L4 = EB2L1 & (!T1L4);


--K1L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[65]~123
--operation mode is normal

K1L5 = T1L4 & T1L5;


--U5L15 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_8|add_sub_cella[1]~118
--operation mode is arithmetic

U5L15_carry_eqn = U5L20;
U5L15 = U5L15_carry_eqn $ (K1L2 # K1L3);

--U5L16 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_8|add_sub_cella[1]~120
--operation mode is arithmetic

U5L16 = CARRY(!K1L2 & !K1L3 # !U5L20);


--U6L16 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_9|add_sub_cella[1]~121
--operation mode is arithmetic

U6L16 = CARRY(!K1L30 & !K1L29 & !U6L8);


--K1L57 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[95]~2639
--operation mode is normal

K1L57 = K1L56 & (!U1L2);


--K1L55 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[95]~66
--operation mode is normal

K1L55 = U1L2 & U1L5;


--U2L9 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~109
--operation mode is arithmetic

U2L9_carry_eqn = U2L12;
U2L9 = U2L9_carry_eqn $ (!K1L54 & !K1L53);

--U2L10 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~111
--operation mode is arithmetic

U2L10 = CARRY(!U2L12 & (K1L54 # K1L53));


--K1L73 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[105]~47
--operation mode is normal

K1L73 = U2L2 & U2L5;


--U3L8 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~105
--operation mode is arithmetic

U3L8 = CARRY(!K1L72 & !K1L71 # !U3L10);


--T2L7 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~88
--operation mode is arithmetic

T2L7_carry_eqn = T2L18;
T2L7 = EB5L11 $ (!T2L7_carry_eqn);

--T2L8 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~90
--operation mode is arithmetic

T2L8 = CARRY(EB5L11 & (!T2L18));


--Q7L5 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~54
--operation mode is arithmetic

Q7L5_carry_eqn = Q7L8;
Q7L5 = U11L4 $ (!Q7L5_carry_eqn);

--Q7L6 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~56
--operation mode is arithmetic

Q7L6 = CARRY(!U11L4 & (!Q7L8));


--Y2L5 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[23]~31
--operation mode is normal

Y2L5 = T2L4 & (!Q7L12);


--Y2L6 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[23]~36
--operation mode is normal

Y2L6 = Q7L12 & (T2L4 $ Q7L4);


--Q8L7 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~56
--operation mode is arithmetic

Q8L7_carry_eqn = Q8L10;
Q8L7 = Q8L7_carry_eqn $ (!Y2L3 & !Y2L4);

--Q8L8 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~58
--operation mode is arithmetic

Q8L8 = CARRY(!Q8L10 & (Y2L3 # Y2L4));


--Y2L12 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[28]~413
--operation mode is normal

Y2L12 = !Q8L4 & (Q7L12 & Q7L5 # !Q7L12 & (U11L4));


--Y2L11 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[28]~26
--operation mode is normal

Y2L11 = Q8L4 & Q8L7;


--Q9L7 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~56
--operation mode is arithmetic

Q9L7_carry_eqn = Q9L10;
Q9L7 = Q9L7_carry_eqn $ (!Y2L10 & !Y2L9);

--Q9L8 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~58
--operation mode is arithmetic

Q9L8 = CARRY(!Q9L10 & (Y2L10 # Y2L9));


--Q7_add_sub_cella[1] is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[1]
--operation mode is arithmetic

Q7_add_sub_cella[1] = U12L4;

--Q7L3 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[1]~COUT
--operation mode is arithmetic

Q7L3 = CARRY(U12L4);


--Y2L10 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[27]~414
--operation mode is normal

Y2L10 = !Q8L4 & (Q7L12 & (!Q7_add_sub_cella[1]) # !Q7L12 & U12L4);


--Q8L9 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~61
--operation mode is arithmetic

Q8L9_carry_eqn = Q8L12;
Q8L9 = Q8L9_carry_eqn $ (!Y2L1 & !Y2L2);

--Q8L10 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~63
--operation mode is arithmetic

Q8L10 = CARRY(!Y2L1 & !Y2L2 & !Q8L12);


--Y2L20 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[33]~415
--operation mode is normal

Y2L20 = !Q9L4 & (Y2L10 # Q8L4 & Q8L9);


--Y2L19 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|StageOut[33]~16
--operation mode is normal

Y2L19 = Q9L4 & Q9L7;


--Q10L5 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~58
--operation mode is arithmetic

Q10L5 = CARRY(!Q10L7 & (Y2L18 # Y2L17));


--T2L9 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u