maxmin.map.eqn

一个自己编写的这次2008北京市电子竞赛VHDL源程序

--operation mode is normal

D1L2 = Q8L4 $ Q10L1;


--U7L2 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~89
--operation mode is normal

U7L2_carry_eqn = U7L4;
U7L2 = !U7L2_carry_eqn;


--U8L2 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~89
--operation mode is normal

U8L2_carry_eqn = U8L4;
U8L2 = !U8L2_carry_eqn;


--U9L2 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~88
--operation mode is normal

U9L2_carry_eqn = U9L4;
U9L2 = !U9L2_carry_eqn;


--D1L18 is display1:inst3|segmin[0]~108
--operation mode is arithmetic

D1L18 = CARRY(K2L77 # K2L76);


--Q12_cout is display1:inst3|lpm_divide:div_rtl_8|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|cout
--operation mode is arithmetic

Q12_cout = CARRY(T3L4 & Q12L4);


--Q13L4 is display1:inst3|lpm_divide:div_rtl_8|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~46
--operation mode is normal

Q13L4_carry_eqn = Q13L6;
Q13L4 = !Q13L4_carry_eqn;


--Q14L4 is display1:inst3|lpm_divide:div_rtl_8|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~46
--operation mode is normal

Q14L4_carry_eqn = Q14L6;
Q14L4 = !Q14L4_carry_eqn;


--Q15L1 is display1:inst3|lpm_divide:div_rtl_8|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~46
--operation mode is normal

Q15L1_carry_eqn = Q15L3;
Q15L1 = !Q15L1_carry_eqn;


--D1L3 is display1:inst3|add~560
--operation mode is normal

D1L3 = Q13L4 $ Q15L1;


--U13L4 is display1:inst3|lpm_divide:div_rtl_7|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~89
--operation mode is normal

U13L4_carry_eqn = U13L6;
U13L4 = !U13L4_carry_eqn;


--U14L4 is display1:inst3|lpm_divide:div_rtl_7|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~89
--operation mode is normal

U14L4_carry_eqn = U14L6;
U14L4 = !U14L4_carry_eqn;


--U15L4 is display1:inst3|lpm_divide:div_rtl_7|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~88
--operation mode is normal

U15L4_carry_eqn = U15L6;
U15L4 = !U15L4_carry_eqn;


--D1L30 is display1:inst3|segpp[0]~108
--operation mode is arithmetic

D1L30 = CARRY(K3L77 # K3L76);


--B1_clko is ADC0820:inst|clko
--operation mode is normal

B1_clko_lut_out = B1_i[4];
B1_clko = DFFEAS(B1_clko_lut_out, clk, VCC, , , , , , );


--B1_current_state_12 is ADC0820:inst|current_state_12
--operation mode is normal

B1_current_state_12_lut_out = B1_current_state.st4;
B1_current_state_12 = DFFEAS(B1_current_state_12_lut_out, B1_clko, VCC, , , , , , );


--B1_current_state_6 is ADC0820:inst|current_state_6
--operation mode is normal

B1_current_state_6_lut_out = B1_current_state.st1;
B1_current_state_6 = DFFEAS(B1_current_state_6_lut_out, B1_clko, VCC, , , , , , );


--C1_i[16] is calculate:inst2|i[16]
--operation mode is arithmetic

C1_i[16]_carry_eqn = C1L58;
C1_i[16]_lut_out = C1_i[16] $ (!C1_i[16]_carry_eqn);
C1_i[16] = DFFEAS(C1_i[16]_lut_out, !B1_current_state.st0, VCC, , , , , , );

--C1L60 is calculate:inst2|i[16]~131
--operation mode is arithmetic

C1L60 = CARRY(C1_i[16] & (!C1L58));


--T1L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~78
--operation mode is normal

T1L4_carry_eqn = T1L8;
T1L4 = T1L4_carry_eqn;


--Q2L4 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48
--operation mode is normal

Q2L4_carry_eqn = Q2L6;
Q2L4 = !Q2L4_carry_eqn;


--Q3L6 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~53
--operation mode is arithmetic

Q3L6 = CARRY(!Y1L5 & !Y1L6 & !Q3L8);


--Q4L6 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53
--operation mode is arithmetic

Q4L6 = CARRY(!Y1L12 & !Y1L11 & !Q4L8);


--Q5L3 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53
--operation mode is arithmetic

Q5L3 = CARRY(!Y1L20 & !Y1L19 & !Q5L5);


--U1L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~96
--operation mode is arithmetic

U1L4 = CARRY(!K1L45 & !K1L44 & !U1L8);


--U2L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~96
--operation mode is arithmetic

U2L4 = CARRY(!K1L61 & !K1L60 & !U2L8);


--U3L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~95
--operation mode is arithmetic

U3L4 = CARRY(!K1L76 & !K1L75 & !U3L6);


--U1L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~99
--operation mode is arithmetic

U1L5_carry_eqn = U1L12;
U1L5 = U1L5_carry_eqn $ (!K1L39 & !K1L38);

--U1L6 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~101
--operation mode is arithmetic

U1L6 = CARRY(!U1L12 & (K1L39 # K1L38));


--U6L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_9|add_sub_cella[1]~89
--operation mode is arithmetic

U6L4_carry_eqn = U6L14;
U6L4 = U6L4_carry_eqn $ (K1L22 # K1L21);

--U6L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_9|add_sub_cella[1]~91
--operation mode is arithmetic

U6L5 = CARRY(!K1L22 & !K1L21 # !U6L14);


--T1L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~83
--operation mode is arithmetic

T1L5_carry_eqn = T1L16;
T1L5 = EB2L1 $ (T1L5_carry_eqn);

--T1L6 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~85
--operation mode is arithmetic

T1L6 = CARRY(!T1L16 # !EB2L1);


--EB2L1 is display1:inst3|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~82
--operation mode is arithmetic

EB2L1_carry_eqn = EB2L10;
EB2L1 = AB1L7 $ AB1L4 $ EB2L1_carry_eqn;

--EB2L2 is display1:inst3|lpm_mult:mult_rtl_0|multcore:mult_core|mpar_add:padder|lpm_add_sub:adder[0]|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~84
--operation mode is arithmetic

EB2L2 = CARRY(AB1L7 & !AB1L4 & !EB2L10 # !AB1L7 & (!EB2L10 # !AB1L4));


--U5L4 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_8|add_sub_cella[1]~88
--operation mode is normal

U5L4_carry_eqn = U5L14;
U5L4 = !U5L4_carry_eqn;


--K1L22 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[75]~2625
--operation mode is normal

K1L22 = !U5L4 & (T1L4 & T1L5 # !T1L4 & (EB2L1));


--U5L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_8|add_sub_cella[1]~93
--operation mode is arithmetic

U5L5_carry_eqn = U5L16;
U5L5 = U5L5_carry_eqn $ (!K1L4 & !K1L5);

--U5L6 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_8|add_sub_cella[1]~95
--operation mode is arithmetic

U5L6 = CARRY(!U5L16 & (K1L4 # K1L5));


--K1L21 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[75]~104
--operation mode is normal

K1L21 = U5L4 & U5L5;


--U6L6 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_9|add_sub_cella[1]~94
--operation mode is normal

U6L6_carry_eqn = U6L16;
U6L6 = !U6L6_carry_eqn;


--K1L56 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[95]~2626
--operation mode is normal

K1L56 = U6L6 & U6L4 # !U6L6 & (K1L22 # K1L21);


--K1L74 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[105]~2627
--operation mode is normal

K1L74 = !U2L2 & (U1L2 & U1L5 # !U1L2 & (K1L56));


--U2L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~99
--operation mode is arithmetic

U2L5_carry_eqn = U2L10;
U2L5 = U2L5_carry_eqn $ (K1L57 # K1L55);

--U2L6 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~101
--operation mode is arithmetic

U2L6 = CARRY(!K1L57 & !K1L55 # !U2L10);


--K1L78 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[115]~2628
--operation mode is normal

K1L78 = !U3L2 & (K1L74 # U2L2 & U2L5);


--U3L5 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~98
--operation mode is arithmetic

U3L5_carry_eqn = U3L8;
U3L5 = U3L5_carry_eqn $ (!K1L74 & !K1L73);

--U3L6 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~100
--operation mode is arithmetic

U3L6 = CARRY(!U3L8 & (K1L74 # K1L73));


--K1L77 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|StageOut[115]~28
--operation mode is normal

K1L77 = U3L2 & U3L5;


--T2L4 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_re8:add_sub_7|add_sub_cella[1]~78
--operation mode is normal

T2L4_carry_eqn = T2L8;
T2L4 = T2L4_carry_eqn;


--Q7L4 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|add_sub_cella[2]~48
--operation mode is normal

Q7L4_carry_eqn = Q7L6;
Q7L4 = !Q7L4_carry_eqn;


--Q8L6 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~53
--operation mode is arithmetic

Q8L6 = CARRY(!Y2L5 & !Y2L6 & !Q8L8);


--Q9L6 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~53
--operation mode is arithmetic

Q9L6 = CARRY(!Y2L12 & !Y2L11 & !Q9L8);


--Q10L3 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~53
--operation mode is arithmetic

Q10L3 = CARRY(!Y2L20 & !Y2L19 & !Q10L5);


--U7L4 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~96
--operation mode is arithmetic

U7L4 = CARRY(!K2L45 & !K2L44 & !U7L8);


--U8L4 is display1:inst3|lpm_divide:div_rtl_4|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~96
--operation mode is arithmetic