maxmin.map.eqn

一个自己编写的这次2008北京市电子竞赛VHDL源程序

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--B1_current_state.st0 is ADC0820:inst|current_state.st0
--operation mode is normal

B1_current_state.st0_lut_out = B1_current_state_1;
B1_current_state.st0 = DFFEAS(B1_current_state.st0_lut_out, clk, VCC, , , , , , );


--C1_clko is calculate:inst2|clko
--operation mode is normal

C1_clko_lut_out = C1_i[17];
C1_clko = DFFEAS(C1_clko_lut_out, !B1_current_state.st0, VCC, , , , , , );


--D1_segmax[7] is display1:inst3|segmax[7]
--operation mode is normal

D1_segmax[7]_lut_out = Q2L12;
D1_segmax[7] = DFFEAS(D1_segmax[7]_lut_out, C1_clko, en, , , , , , );


--D1_segmax[6] is display1:inst3|segmax[6]
--operation mode is normal

D1_segmax[6]_lut_out = Q3L4;
D1_segmax[6] = DFFEAS(D1_segmax[6]_lut_out, C1_clko, en, , , , , , );


--D1_segmax[5] is display1:inst3|segmax[5]
--operation mode is normal

D1_segmax[5]_lut_out = Q4L4;
D1_segmax[5] = DFFEAS(D1_segmax[5]_lut_out, C1_clko, en, , , , , , );


--D1_segmax[4] is display1:inst3|segmax[4]
--operation mode is normal

D1_segmax[4]_lut_out = Q5L1;
D1_segmax[4] = DFFEAS(D1_segmax[4]_lut_out, C1_clko, en, , , , , , );


--D1_segmax[3] is display1:inst3|segmax[3]
--operation mode is normal

D1_segmax[3]_carry_eqn = D1L10;
D1_segmax[3]_lut_out = D1L1 $ U1L2 $ D1_segmax[3]_carry_eqn;
D1_segmax[3] = DFFEAS(D1_segmax[3]_lut_out, C1_clko, en, , , , , , );


--D1_segmax[2] is display1:inst3|segmax[2]
--operation mode is arithmetic

D1_segmax[2]_carry_eqn = D1L8;
D1_segmax[2]_lut_out = Q4L4 $ U2L2 $ !D1_segmax[2]_carry_eqn;
D1_segmax[2] = DFFEAS(D1_segmax[2]_lut_out, C1_clko, en, , , , , , );

--D1L10 is display1:inst3|segmax[2]~95
--operation mode is arithmetic

D1L10 = CARRY(Q4L4 & (!D1L8 # !U2L2) # !Q4L4 & !U2L2 & !D1L8);


--D1_segmax[1] is display1:inst3|segmax[1]
--operation mode is arithmetic

D1_segmax[1]_lut_out = Q5L1 $ U3L2;
D1_segmax[1] = DFFEAS(D1_segmax[1]_lut_out, C1_clko, en, , , , , , );

--D1L8 is display1:inst3|segmax[1]~99
--operation mode is arithmetic

D1L8 = CARRY(U3L2 # !Q5L1);


--D1_segmax[0] is display1:inst3|segmax[0]
--operation mode is normal

D1_segmax[0]_carry_eqn = D1L6;
D1_segmax[0]_lut_out = D1_segmax[0]_carry_eqn;
D1_segmax[0] = DFFEAS(D1_segmax[0]_lut_out, C1_clko, en, , , , , , );


--D1_segmin[7] is display1:inst3|segmin[7]
--operation mode is normal

D1_segmin[7]_lut_out = Q7L12;
D1_segmin[7] = DFFEAS(D1_segmin[7]_lut_out, C1_clko, en, , , , , , );


--D1_segmin[6] is display1:inst3|segmin[6]
--operation mode is normal

D1_segmin[6]_lut_out = Q8L4;
D1_segmin[6] = DFFEAS(D1_segmin[6]_lut_out, C1_clko, en, , , , , , );


--D1_segmin[5] is display1:inst3|segmin[5]
--operation mode is normal

D1_segmin[5]_lut_out = Q9L4;
D1_segmin[5] = DFFEAS(D1_segmin[5]_lut_out, C1_clko, en, , , , , , );


--D1_segmin[4] is display1:inst3|segmin[4]
--operation mode is normal

D1_segmin[4]_lut_out = Q10L1;
D1_segmin[4] = DFFEAS(D1_segmin[4]_lut_out, C1_clko, en, , , , , , );


--D1_segmin[3] is display1:inst3|segmin[3]
--operation mode is normal

D1_segmin[3]_carry_eqn = D1L22;
D1_segmin[3]_lut_out = D1L2 $ U7L2 $ D1_segmin[3]_carry_eqn;
D1_segmin[3] = DFFEAS(D1_segmin[3]_lut_out, C1_clko, en, , , , , , );


--D1_segmin[2] is display1:inst3|segmin[2]
--operation mode is arithmetic

D1_segmin[2]_carry_eqn = D1L20;
D1_segmin[2]_lut_out = Q9L4 $ U8L2 $ !D1_segmin[2]_carry_eqn;
D1_segmin[2] = DFFEAS(D1_segmin[2]_lut_out, C1_clko, en, , , , , , );

--D1L22 is display1:inst3|segmin[2]~95
--operation mode is arithmetic

D1L22 = CARRY(Q9L4 & (!D1L20 # !U8L2) # !Q9L4 & !U8L2 & !D1L20);


--D1_segmin[1] is display1:inst3|segmin[1]
--operation mode is arithmetic

D1_segmin[1]_lut_out = Q10L1 $ U9L2;
D1_segmin[1] = DFFEAS(D1_segmin[1]_lut_out, C1_clko, en, , , , , , );

--D1L20 is display1:inst3|segmin[1]~99
--operation mode is arithmetic

D1L20 = CARRY(U9L2 # !Q10L1);


--D1_segmin[0] is display1:inst3|segmin[0]
--operation mode is normal

D1_segmin[0]_carry_eqn = D1L18;
D1_segmin[0]_lut_out = D1_segmin[0]_carry_eqn;
D1_segmin[0] = DFFEAS(D1_segmin[0]_lut_out, C1_clko, en, , , , , , );


--D1_segpp[7] is display1:inst3|segpp[7]
--operation mode is normal

D1_segpp[7]_lut_out = Q12L12;
D1_segpp[7] = DFFEAS(D1_segpp[7]_lut_out, C1_clko, en, , , , , , );


--D1_segpp[6] is display1:inst3|segpp[6]
--operation mode is normal

D1_segpp[6]_lut_out = Q13L4;
D1_segpp[6] = DFFEAS(D1_segpp[6]_lut_out, C1_clko, en, , , , , , );


--D1_segpp[5] is display1:inst3|segpp[5]
--operation mode is normal

D1_segpp[5]_lut_out = Q14L4;
D1_segpp[5] = DFFEAS(D1_segpp[5]_lut_out, C1_clko, en, , , , , , );


--D1_segpp[4] is display1:inst3|segpp[4]
--operation mode is normal

D1_segpp[4]_lut_out = Q15L1;
D1_segpp[4] = DFFEAS(D1_segpp[4]_lut_out, C1_clko, en, , , , , , );


--D1_segpp[3] is display1:inst3|segpp[3]
--operation mode is normal

D1_segpp[3]_carry_eqn = D1L34;
D1_segpp[3]_lut_out = D1L3 $ U13L4 $ D1_segpp[3]_carry_eqn;
D1_segpp[3] = DFFEAS(D1_segpp[3]_lut_out, C1_clko, en, , , , , , );


--D1_segpp[2] is display1:inst3|segpp[2]
--operation mode is arithmetic

D1_segpp[2]_carry_eqn = D1L32;
D1_segpp[2]_lut_out = Q14L4 $ U14L4 $ !D1_segpp[2]_carry_eqn;
D1_segpp[2] = DFFEAS(D1_segpp[2]_lut_out, C1_clko, en, , , , , , );

--D1L34 is display1:inst3|segpp[2]~95
--operation mode is arithmetic

D1L34 = CARRY(Q14L4 & (!D1L32 # !U14L4) # !Q14L4 & !U14L4 & !D1L32);


--D1_segpp[1] is display1:inst3|segpp[1]
--operation mode is arithmetic

D1_segpp[1]_lut_out = Q15L1 $ U15L4;
D1_segpp[1] = DFFEAS(D1_segpp[1]_lut_out, C1_clko, en, , , , , , );

--D1L32 is display1:inst3|segpp[1]~99
--operation mode is arithmetic

D1L32 = CARRY(U15L4 # !Q15L1);


--D1_segpp[0] is display1:inst3|segpp[0]
--operation mode is normal

D1_segpp[0]_carry_eqn = D1L30;
D1_segpp[0]_lut_out = D1_segpp[0]_carry_eqn;
D1_segpp[0] = DFFEAS(D1_segpp[0]_lut_out, C1_clko, en, , , , , , );


--B1_current_state_1 is ADC0820:inst|current_state_1
--operation mode is normal

B1_current_state_1_lut_out = !B1_current_state.st5;
B1_current_state_1 = DFFEAS(B1_current_state_1_lut_out, B1_clko, VCC, , , , , , );


--B1_current_state.st5 is ADC0820:inst|current_state.st5
--operation mode is normal

B1_current_state.st5_lut_out = B1_current_state_12;
B1_current_state.st5 = DFFEAS(B1_current_state.st5_lut_out, clk, VCC, , , , , , );


--B1_current_state.st2 is ADC0820:inst|current_state.st2
--operation mode is normal

B1_current_state.st2_lut_out = B1_current_state_6;
B1_current_state.st2 = DFFEAS(B1_current_state.st2_lut_out, clk, VCC, , , , , , );


--C1_i[17] is calculate:inst2|i[17]
--operation mode is normal

C1_i[17]_carry_eqn = C1L60;
C1_i[17]_lut_out = C1_i[17] $ (C1_i[17]_carry_eqn);
C1_i[17] = DFFEAS(C1_i[17]_lut_out, !B1_current_state.st0, VCC, , , , , , );


--Q2_cout is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|cout
--operation mode is arithmetic

Q2_cout = CARRY(T1L4 & Q2L4);


--Q3L4 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~46
--operation mode is normal

Q3L4_carry_eqn = Q3L6;
Q3L4 = !Q3L4_carry_eqn;


--Q4L4 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~46
--operation mode is normal

Q4L4_carry_eqn = Q4L6;
Q4L4 = !Q4L4_carry_eqn;


--Q5L1 is display1:inst3|lpm_divide:div_rtl_2|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~46
--operation mode is normal

Q5L1_carry_eqn = Q5L3;
Q5L1 = !Q5L1_carry_eqn;


--D1L1 is display1:inst3|add~558
--operation mode is normal

D1L1 = Q3L4 $ Q5L1;


--U1L2 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_10|add_sub_cella[1]~89
--operation mode is normal

U1L2_carry_eqn = U1L4;
U1L2 = !U1L2_carry_eqn;


--U2L2 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_11|add_sub_cella[1]~89
--operation mode is normal

U2L2_carry_eqn = U2L4;
U2L2 = !U2L2_carry_eqn;


--U3L2 is display1:inst3|lpm_divide:div_rtl_1|lpm_divide_5nf:auto_generated|sign_div_unsign_7jg:divider|alt_u_div_jod:divider|add_sub_se8:add_sub_12|add_sub_cella[1]~88
--operation mode is normal

U3L2_carry_eqn = U3L4;
U3L2 = !U3L2_carry_eqn;


--D1L6 is display1:inst3|segmax[0]~108
--operation mode is arithmetic

D1L6 = CARRY(K1L78 # K1L77);


--Q7_cout is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_4|cout
--operation mode is arithmetic

Q7_cout = CARRY(T2L4 & Q7L4);


--Q8L4 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_5|add_sub_cella[2]~46
--operation mode is normal

Q8L4_carry_eqn = Q8L6;
Q8L4 = !Q8L4_carry_eqn;


--Q9L4 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_6|add_sub_cella[2]~46
--operation mode is normal

Q9L4_carry_eqn = Q9L6;
Q9L4 = !Q9L4_carry_eqn;


--Q10L1 is display1:inst3|lpm_divide:div_rtl_5|lpm_divide_klf:auto_generated|sign_div_unsign_mhg:divider|alt_u_div_hld:divider|add_sub_oe8:add_sub_7|add_sub_cella[2]~46
--operation mode is normal

Q10L1_carry_eqn = Q10L3;
Q10L1 = !Q10L1_carry_eqn;


--D1L2 is display1:inst3|add~559