cpu.map.eqn

来自「实现了CPU的基本功能」· EQN 代码 · 共 2,251 行 · 第 1/5 页

B1_temp_mr[11] = DFFEA(B1_temp_mr[11]_lut_out, CLOCK, , , B1L627, , );

--B1L675Q is ALU:inst|temp_mr[11]~143
--operation mode is normal

B1L675Q = B1_temp_mr[11];


--B1_temp_mr[10] is ALU:inst|temp_mr[10]
--operation mode is normal

B1_temp_mr[10]_lut_out = A1L147 & (B1_temp_mr[11]) # !A1L147 & B1L200;
B1_temp_mr[10] = DFFEA(B1_temp_mr[10]_lut_out, CLOCK, , , B1L627, , );

--B1L673Q is ALU:inst|temp_mr[10]~144
--operation mode is normal

B1L673Q = B1_temp_mr[10];


--B1_temp_mr[9] is ALU:inst|temp_mr[9]
--operation mode is normal

B1_temp_mr[9]_lut_out = A1L147 & (B1_temp_mr[10]) # !A1L147 & B1L201;
B1_temp_mr[9] = DFFEA(B1_temp_mr[9]_lut_out, CLOCK, , , B1L627, , );

--B1L671Q is ALU:inst|temp_mr[9]~145
--operation mode is normal

B1L671Q = B1_temp_mr[9];


--B1_temp_mr[8] is ALU:inst|temp_mr[8]
--operation mode is normal

B1_temp_mr[8]_lut_out = A1L147 & (B1_temp_mr[9]) # !A1L147 & B1L202;
B1_temp_mr[8] = DFFEA(B1_temp_mr[8]_lut_out, CLOCK, , , B1L627, , );

--B1L669Q is ALU:inst|temp_mr[8]~146
--operation mode is normal

B1L669Q = B1_temp_mr[8];


--B1_temp_mr[7] is ALU:inst|temp_mr[7]
--operation mode is normal

B1_temp_mr[7]_lut_out = A1L147 & (B1_temp_mr[8]) # !A1L147 & B1L203;
B1_temp_mr[7] = DFFEA(B1_temp_mr[7]_lut_out, CLOCK, , , B1L627, , );

--B1L667Q is ALU:inst|temp_mr[7]~147
--operation mode is normal

B1L667Q = B1_temp_mr[7];


--B1_temp_mr[6] is ALU:inst|temp_mr[6]
--operation mode is normal

B1_temp_mr[6]_lut_out = A1L147 & (B1_temp_mr[7]) # !A1L147 & B1L204;
B1_temp_mr[6] = DFFEA(B1_temp_mr[6]_lut_out, CLOCK, , , B1L627, , );

--B1L665Q is ALU:inst|temp_mr[6]~148
--operation mode is normal

B1L665Q = B1_temp_mr[6];


--B1_temp_mr[5] is ALU:inst|temp_mr[5]
--operation mode is normal

B1_temp_mr[5]_lut_out = A1L147 & (B1_temp_mr[6]) # !A1L147 & B1L205;
B1_temp_mr[5] = DFFEA(B1_temp_mr[5]_lut_out, CLOCK, , , B1L627, , );

--B1L663Q is ALU:inst|temp_mr[5]~149
--operation mode is normal

B1L663Q = B1_temp_mr[5];


--B1_temp_mr[4] is ALU:inst|temp_mr[4]
--operation mode is normal

B1_temp_mr[4]_lut_out = A1L147 & (B1_temp_mr[5]) # !A1L147 & B1L206;
B1_temp_mr[4] = DFFEA(B1_temp_mr[4]_lut_out, CLOCK, , , B1L627, , );

--B1L661Q is ALU:inst|temp_mr[4]~150
--operation mode is normal

B1L661Q = B1_temp_mr[4];


--B1_temp_mr[3] is ALU:inst|temp_mr[3]
--operation mode is normal

B1_temp_mr[3]_lut_out = A1L147 & (B1_temp_mr[4]) # !A1L147 & B1L207;
B1_temp_mr[3] = DFFEA(B1_temp_mr[3]_lut_out, CLOCK, , , B1L627, , );

--B1L659Q is ALU:inst|temp_mr[3]~151
--operation mode is normal

B1L659Q = B1_temp_mr[3];


--B1_temp_mr[2] is ALU:inst|temp_mr[2]
--operation mode is normal

B1_temp_mr[2]_lut_out = A1L147 & (B1_temp_mr[3]) # !A1L147 & B1L208;
B1_temp_mr[2] = DFFEA(B1_temp_mr[2]_lut_out, CLOCK, , , B1L627, , );

--B1L657Q is ALU:inst|temp_mr[2]~152
--operation mode is normal

B1L657Q = B1_temp_mr[2];


--B1_temp_mr[1] is ALU:inst|temp_mr[1]
--operation mode is normal

B1_temp_mr[1]_lut_out = A1L147 & (B1_temp_mr[2]) # !A1L147 & B1L209;
B1_temp_mr[1] = DFFEA(B1_temp_mr[1]_lut_out, CLOCK, , , B1L627, , );

--B1L655Q is ALU:inst|temp_mr[1]~153
--operation mode is normal

B1L655Q = B1_temp_mr[1];


--A1L156 is rtl~871
--operation mode is normal

A1L156 = !V1_q[23] & !V1_q[22] & !V1_q[21] & !V1_q[20];

--A1L175 is rtl~909
--operation mode is normal

A1L175 = !V1_q[23] & !V1_q[22] & !V1_q[21] & !V1_q[20];


--A1L157 is rtl~872
--operation mode is normal

A1L157 = A1L156 & (!V1_q[19] & !V1_q[18]);

--A1L176 is rtl~910
--operation mode is normal

A1L176 = A1L156 & (!V1_q[19] & !V1_q[18]);


--A1L158 is rtl~873
--operation mode is normal

A1L158 = A1L157 & !V1_q[17] & !V1_q[13] & !V1_q[12];

--A1L177 is rtl~911
--operation mode is normal

A1L177 = A1L157 & !V1_q[17] & !V1_q[13] & !V1_q[12];


--A1L150 is rtl~7
--operation mode is normal

A1L150 = A1L158 & V1_q[16] & !V1_q[15] & !V1_q[14];

--A1L178 is rtl~912
--operation mode is normal

A1L178 = A1L158 & V1_q[16] & !V1_q[15] & !V1_q[14];


--B1L123 is ALU:inst|Select~20392
--operation mode is normal

B1L123 = A1L150 & (B1_temp_acc[15] # G1_output[15]);

--B1L333 is ALU:inst|Select~20709
--operation mode is normal

B1L333 = A1L150 & (B1_temp_acc[15] # G1_output[15]);


--A1L152 is rtl~9
--operation mode is normal

A1L152 = A1L158 & V1_q[14] & !V1_q[15] & !V1_q[16];

--A1L179 is rtl~913
--operation mode is normal

A1L179 = A1L158 & V1_q[14] & !V1_q[15] & !V1_q[16];


--B1L124 is ALU:inst|Select~20393
--operation mode is normal

B1L124 = B1L123 # A1L152 & (!M2_unreg_res_node[16]);

--B1L334 is ALU:inst|Select~20710
--operation mode is normal

B1L334 = B1L123 # A1L152 & (!M2_unreg_res_node[16]);


--A1L159 is rtl~874
--operation mode is normal

A1L159 = !V1_q[17] & !V1_q[15] & !V1_q[16] & !V1_q[14];

--A1L180 is rtl~914
--operation mode is normal

A1L180 = !V1_q[17] & !V1_q[15] & !V1_q[16] & !V1_q[14];


--A1L160 is rtl~875
--operation mode is normal

A1L160 = A1L159 & (!V1_q[13] & !V1_q[12]);

--A1L181 is rtl~915
--operation mode is normal

A1L181 = A1L159 & (!V1_q[13] & !V1_q[12]);


--A1L148 is rtl~5
--operation mode is normal

A1L148 = A1L156 & V1_q[19] & A1L160 & !V1_q[18];

--A1L182 is rtl~916
--operation mode is normal

A1L182 = A1L156 & V1_q[19] & A1L160 & !V1_q[18];


--A1L161 is rtl~876
--operation mode is normal

A1L161 = A1L159 & !V1_q[19] & !V1_q[13] & !V1_q[12];

--A1L183 is rtl~917
--operation mode is normal

A1L183 = A1L159 & !V1_q[19] & !V1_q[13] & !V1_q[12];


--A1L162 is rtl~877
--operation mode is normal

A1L162 = !V1_q[22] & !V1_q[21] & !V1_q[20];

--A1L184 is rtl~918
--operation mode is normal

A1L184 = !V1_q[22] & !V1_q[21] & !V1_q[20];


--A1L145 is rtl~0
--operation mode is normal

A1L145 = A1L161 & V1_q[23] & A1L162 & !V1_q[18];

--A1L185 is rtl~919
--operation mode is normal

A1L185 = A1L161 & V1_q[23] & A1L162 & !V1_q[18];


--B1L72 is ALU:inst|process0~4
--operation mode is normal

B1L72 = B1_temp_acc[14] $ !M1_unreg_res_node[15];

--B1L82 is ALU:inst|process0~364
--operation mode is normal

B1L82 = B1_temp_acc[14] $ !M1_unreg_res_node[15];


--P2_cs_buffer[6] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

P2_cs_buffer[6] = B1_temp_acc[5] $ M1_datab_node[6] $ P2_cout[5];

--P2L31 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~296
--operation mode is arithmetic

P2L31 = B1_temp_acc[5] $ M1_datab_node[6] $ P2_cout[5];

--P2_cout[6] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

P2_cout[6] = CARRY(B1_temp_acc[5] & (P2_cout[5] # !M1_datab_node[6]) # !B1_temp_acc[5] & !M1_datab_node[6] & P2_cout[5]);


--P2_cs_buffer[5] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]
--operation mode is arithmetic

P2_cs_buffer[5] = B1_temp_acc[4] $ M1_datab_node[5] $ P2_cout[4];

--P2L29 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[5]~297
--operation mode is arithmetic

P2L29 = B1_temp_acc[4] $ M1_datab_node[5] $ P2_cout[4];

--P2_cout[5] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[5]
--operation mode is arithmetic

P2_cout[5] = CARRY(B1_temp_acc[4] & (P2_cout[4] # !M1_datab_node[5]) # !B1_temp_acc[4] & !M1_datab_node[5] & P2_cout[4]);


--P2_cs_buffer[4] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]
--operation mode is arithmetic

P2_cs_buffer[4] = B1_temp_acc[3] $ M1_datab_node[4] $ P2_cout[3];

--P2L27 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[4]~298
--operation mode is arithmetic

P2L27 = B1_temp_acc[3] $ M1_datab_node[4] $ P2_cout[3];

--P2_cout[4] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[4]
--operation mode is arithmetic

P2_cout[4] = CARRY(B1_temp_acc[3] & (P2_cout[3] # !M1_datab_node[4]) # !B1_temp_acc[3] & !M1_datab_node[4] & P2_cout[3]);


--P2_cs_buffer[3] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

P2_cs_buffer[3] = B1_temp_acc[2] $ M1_datab_node[3] $ P2_cout[2];

--P2L25 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~299
--operation mode is arithmetic

P2L25 = B1_temp_acc[2] $ M1_datab_node[3] $ P2_cout[2];

--P2_cout[3] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

P2_cout[3] = CARRY(B1_temp_acc[2] & (P2_cout[2] # !M1_datab_node[3]) # !B1_temp_acc[2] & !M1_datab_node[3] & P2_cout[2]);


--B1L74 is ALU:inst|process0~341
--operation mode is normal

B1L74 = P2_cs_buffer[6] & P2_cs_buffer[5] & P2_cs_buffer[4] & P2_cs_buffer[3];

--B1L83 is ALU:inst|process0~365
--operation mode is normal

B1L83 = P2_cs_buffer[6] & P2_cs_buffer[5] & P2_cs_buffer[4] & P2_cs_buffer[3];


--P2_cs_buffer[2] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

P2_cs_buffer[2] = B1_temp_acc[1] $ M1_datab_node[2] $ P2_cout[1];

--P2L23 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~300
--operation mode is arithmetic

P2L23 = B1_temp_acc[1] $ M1_datab_node[2] $ P2_cout[1];

--P2_cout[2] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

P2_cout[2] = CARRY(B1_temp_acc[1] & (P2_cout[1] # !M1_datab_node[2]) # !B1_temp_acc[1] & !M1_datab_node[2] & P2_cout[1]);


--P2_cs_buffer[1] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

P2_cs_buffer[1] = B1_temp_acc[0] $ M1_datab_node[1] $ P2_cout[0];

--P2L21 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~301
--operation mode is arithmetic

P2L21 = B1_temp_acc[0] $ M1_datab_node[1] $ P2_cout[0];

--P2_cout[1] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

P2_cout[1] = CARRY(B1_temp_acc[0] & (P2_cout[0] # !M1_datab_node[1]) # !B1_temp_acc[0] & !M1_datab_node[1] & P2_cout[0]);


--P2_cs_buffer[0] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

P2_cs_buffer[0] = G1_output[0] $ B1_temp_dr[15];

--P2L19 is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~302
--operation mode is arithmetic

P2L19 = G1_output[0] $ B1_temp_dr[15];

--P2_cout[0] is ALU:inst|lpm_add_sub:add_rtl_1|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

P2_cout[0] = CARRY(G1_output[0] & B1_temp_dr[15] # !G1_output[0] & (!M1_$00006));


--B1L75 is ALU:inst|process0~342
--operation mode is normal

B1L75 = B1L74 & P2_cs_buffer[2] & P2_cs_buffer[1] & !P2_cs_buffer[0];

--B1L84 is ALU:inst|process0~366
--operation mode is normal

B1L84 = B1L74 & P2_cs_buffer[2] & P2_cs_buffer[1] & !P2_cs_buffer[0];


--B1L73 is ALU:inst|process0~5
--operation mode is normal

B1L73 = B1L79 & B1L80 & B1L81 & B1L75;

--B1L85 is ALU:inst|process0~367
--operation mode is normal

B1L85 = B1L79 & B1L80 & B1L81 & B1L75;


--B1L125 is ALU:inst|Select~20394
--operation mode is normal

B1L125 = A1L148 # A1L145 & B1L72 & !B1L73;

--B1L335 is ALU:inst|Select~20711
--operation mode is normal

B1L335 = A1L148 # A1L145 & B1L72 & !B1L73;


--B1L126 is ALU:inst|Select~20396
--operation mode is normal

B1L126 = B1L124 # B1_temp_acc[14] & B1L125 # !B1L318;

--B1L336 is ALU:inst|Select~20712
--operation mode is normal

B1L336 = B1L124 # B1_temp_acc[14] & B1L125 # !B1L318;


--B1L96 is ALU:inst|reduce_nor~459
--operation mode is normal