cpu.map.eqn

来自「实现了CPU的基本功能」· EQN 代码 · 共 2,251 行 · 第 1/5 页

--J1L3Q is sequence:inst23|CAR[0]~285
--operation mode is arithmetic

J1L3Q = J1_CAR[0];

--P11_cout[0] is sequence:inst23|lpm_add_sub:add_rtl_4|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

P11_cout[0] = CARRY(J1_CAR[0]);


--B1_FLAGS[1] is ALU:inst|FLAGS[1]
--operation mode is normal

B1_FLAGS[1]_lut_out = A1L172 & A1L173 & A1L174 & A1L168;
B1_FLAGS[1] = DFFEA(B1_FLAGS[1]_lut_out, CLOCK, !RESET, , , , );

--B1L70Q is ALU:inst|FLAGS[1]~0
--operation mode is normal

B1L70Q = B1_FLAGS[1];


--B1_FLAGS[0] is ALU:inst|FLAGS[0]
--operation mode is normal

B1_FLAGS[0]_lut_out = !B1L126 & B1L129 & (!B1L98 # !B1_temp_acc[15]);
B1_FLAGS[0] = DFFEA(B1_FLAGS[0]_lut_out, CLOCK, !RESET, , , , );

--B1L68Q is ALU:inst|FLAGS[0]~1
--operation mode is normal

B1L68Q = B1_FLAGS[0];


--D1_output[15] is MBR:inst18|output[15]
--operation mode is normal

D1_output[15]_lut_out = V1_q[3] & R1_q[15] # !V1_q[3] & (D1L34);
D1_output[15] = DFFEA(D1_output[15]_lut_out, CLOCK, !RESET, , , , );

--D1L33Q is MBR:inst18|output[15]~1344
--operation mode is normal

D1L33Q = D1_output[15];


--D1_output[14] is MBR:inst18|output[14]
--operation mode is normal

D1_output[14]_lut_out = V1_q[3] & R1_q[14] # !V1_q[3] & (D1L35);
D1_output[14] = DFFEA(D1_output[14]_lut_out, CLOCK, !RESET, , , , );

--D1L31Q is MBR:inst18|output[14]~1345
--operation mode is normal

D1L31Q = D1_output[14];


--D1_output[13] is MBR:inst18|output[13]
--operation mode is normal

D1_output[13]_lut_out = V1_q[3] & R1_q[13] # !V1_q[3] & (D1L36);
D1_output[13] = DFFEA(D1_output[13]_lut_out, CLOCK, !RESET, , , , );

--D1L29Q is MBR:inst18|output[13]~1346
--operation mode is normal

D1L29Q = D1_output[13];


--D1_output[12] is MBR:inst18|output[12]
--operation mode is normal

D1_output[12]_lut_out = V1_q[3] & R1_q[12] # !V1_q[3] & (D1L37);
D1_output[12] = DFFEA(D1_output[12]_lut_out, CLOCK, !RESET, , , , );

--D1L27Q is MBR:inst18|output[12]~1347
--operation mode is normal

D1L27Q = D1_output[12];


--D1_output[11] is MBR:inst18|output[11]
--operation mode is normal

D1_output[11]_lut_out = V1_q[3] & R1_q[11] # !V1_q[3] & (D1L38);
D1_output[11] = DFFEA(D1_output[11]_lut_out, CLOCK, !RESET, , , , );

--D1L25Q is MBR:inst18|output[11]~1348
--operation mode is normal

D1L25Q = D1_output[11];


--D1_output[10] is MBR:inst18|output[10]
--operation mode is normal

D1_output[10]_lut_out = V1_q[3] & R1_q[10] # !V1_q[3] & (D1L39);
D1_output[10] = DFFEA(D1_output[10]_lut_out, CLOCK, !RESET, , , , );

--D1L23Q is MBR:inst18|output[10]~1349
--operation mode is normal

D1L23Q = D1_output[10];


--D1_output[9] is MBR:inst18|output[9]
--operation mode is normal

D1_output[9]_lut_out = V1_q[3] & R1_q[9] # !V1_q[3] & (D1L40);
D1_output[9] = DFFEA(D1_output[9]_lut_out, CLOCK, !RESET, , , , );

--D1L21Q is MBR:inst18|output[9]~1350
--operation mode is normal

D1L21Q = D1_output[9];


--D1_output[8] is MBR:inst18|output[8]
--operation mode is normal

D1_output[8]_lut_out = V1_q[3] & R1_q[8] # !V1_q[3] & (D1L41);
D1_output[8] = DFFEA(D1_output[8]_lut_out, CLOCK, !RESET, , , , );

--D1L19Q is MBR:inst18|output[8]~1351
--operation mode is normal

D1L19Q = D1_output[8];


--D1_output[7] is MBR:inst18|output[7]
--operation mode is normal

D1_output[7]_lut_out = V1_q[3] & R1_q[7] # !V1_q[3] & (D1L42);
D1_output[7] = DFFEA(D1_output[7]_lut_out, CLOCK, !RESET, , , , );

--D1L17Q is MBR:inst18|output[7]~1352
--operation mode is normal

D1L17Q = D1_output[7];


--D1_output[6] is MBR:inst18|output[6]
--operation mode is normal

D1_output[6]_lut_out = V1_q[3] & R1_q[6] # !V1_q[3] & (D1L43);
D1_output[6] = DFFEA(D1_output[6]_lut_out, CLOCK, !RESET, , , , );

--D1L15Q is MBR:inst18|output[6]~1353
--operation mode is normal

D1L15Q = D1_output[6];


--D1_output[5] is MBR:inst18|output[5]
--operation mode is normal

D1_output[5]_lut_out = V1_q[3] & R1_q[5] # !V1_q[3] & (D1L44);
D1_output[5] = DFFEA(D1_output[5]_lut_out, CLOCK, !RESET, , , , );

--D1L13Q is MBR:inst18|output[5]~1354
--operation mode is normal

D1L13Q = D1_output[5];


--D1_output[4] is MBR:inst18|output[4]
--operation mode is normal

D1_output[4]_lut_out = V1_q[3] & R1_q[4] # !V1_q[3] & (D1L45);
D1_output[4] = DFFEA(D1_output[4]_lut_out, CLOCK, !RESET, , , , );

--D1L11Q is MBR:inst18|output[4]~1355
--operation mode is normal

D1L11Q = D1_output[4];


--D1_output[3] is MBR:inst18|output[3]
--operation mode is normal

D1_output[3]_lut_out = V1_q[3] & R1_q[3] # !V1_q[3] & (D1L46);
D1_output[3] = DFFEA(D1_output[3]_lut_out, CLOCK, !RESET, , , , );

--D1L9Q is MBR:inst18|output[3]~1356
--operation mode is normal

D1L9Q = D1_output[3];


--D1_output[2] is MBR:inst18|output[2]
--operation mode is normal

D1_output[2]_lut_out = V1_q[3] & R1_q[2] # !V1_q[3] & (D1L47);
D1_output[2] = DFFEA(D1_output[2]_lut_out, CLOCK, !RESET, , , , );

--D1L7Q is MBR:inst18|output[2]~1357
--operation mode is normal

D1L7Q = D1_output[2];


--D1_output[1] is MBR:inst18|output[1]
--operation mode is normal

D1_output[1]_lut_out = V1_q[3] & R1_q[1] # !V1_q[3] & (D1L48);
D1_output[1] = DFFEA(D1_output[1]_lut_out, CLOCK, !RESET, , , , );

--D1L5Q is MBR:inst18|output[1]~1358
--operation mode is normal

D1L5Q = D1_output[1];


--D1_output[0] is MBR:inst18|output[0]
--operation mode is normal

D1_output[0]_lut_out = V1_q[3] & R1_q[0] # !V1_q[3] & (D1L49);
D1_output[0] = DFFEA(D1_output[0]_lut_out, CLOCK, !RESET, , , , );

--D1L3Q is MBR:inst18|output[0]~1359
--operation mode is normal

D1L3Q = D1_output[0];


--E1_output[7] is MAR:inst19|output[7]
--operation mode is normal

E1_output[7]_lut_out = V1_q[5] & D1_output[7] # !V1_q[5] & (E1L18);
E1_output[7] = DFFEA(E1_output[7]_lut_out, CLOCK, !RESET, , , , );

--E1L17Q is MAR:inst19|output[7]~672
--operation mode is normal

E1L17Q = E1_output[7];


--E1_output[6] is MAR:inst19|output[6]
--operation mode is normal

E1_output[6]_lut_out = V1_q[5] & D1_output[6] # !V1_q[5] & (E1L19);
E1_output[6] = DFFEA(E1_output[6]_lut_out, CLOCK, !RESET, , , , );

--E1L15Q is MAR:inst19|output[6]~673
--operation mode is normal

E1L15Q = E1_output[6];


--E1_output[5] is MAR:inst19|output[5]
--operation mode is normal

E1_output[5]_lut_out = V1_q[5] & D1_output[5] # !V1_q[5] & (E1L20);
E1_output[5] = DFFEA(E1_output[5]_lut_out, CLOCK, !RESET, , , , );

--E1L13Q is MAR:inst19|output[5]~674
--operation mode is normal

E1L13Q = E1_output[5];


--E1_output[4] is MAR:inst19|output[4]
--operation mode is normal

E1_output[4]_lut_out = V1_q[5] & D1_output[4] # !V1_q[5] & (E1L21);
E1_output[4] = DFFEA(E1_output[4]_lut_out, CLOCK, !RESET, , , , );

--E1L11Q is MAR:inst19|output[4]~675
--operation mode is normal

E1L11Q = E1_output[4];


--E1_output[3] is MAR:inst19|output[3]
--operation mode is normal

E1_output[3]_lut_out = V1_q[5] & D1_output[3] # !V1_q[5] & (E1L22);
E1_output[3] = DFFEA(E1_output[3]_lut_out, CLOCK, !RESET, , , , );

--E1L9Q is MAR:inst19|output[3]~676
--operation mode is normal

E1L9Q = E1_output[3];


--E1_output[2] is MAR:inst19|output[2]
--operation mode is normal

E1_output[2]_lut_out = V1_q[5] & D1_output[2] # !V1_q[5] & (E1L23);
E1_output[2] = DFFEA(E1_output[2]_lut_out, CLOCK, !RESET, , , , );

--E1L7Q is MAR:inst19|output[2]~677
--operation mode is normal

E1L7Q = E1_output[2];


--E1_output[1] is MAR:inst19|output[1]
--operation mode is normal

E1_output[1]_lut_out = V1_q[5] & D1_output[1] # !V1_q[5] & (E1L24);
E1_output[1] = DFFEA(E1_output[1]_lut_out, CLOCK, !RESET, , , , );

--E1L5Q is MAR:inst19|output[1]~678
--operation mode is normal

E1L5Q = E1_output[1];


--E1_output[0] is MAR:inst19|output[0]
--operation mode is normal

E1_output[0]_lut_out = V1_q[5] & D1_output[0] # !V1_q[5] & (E1L25);
E1_output[0] = DFFEA(E1_output[0]_lut_out, CLOCK, !RESET, , , , );

--E1L3Q is MAR:inst19|output[0]~679
--operation mode is normal

E1L3Q = E1_output[0];


--T1_q[7] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[7]
--operation mode is clrb_cntr

T1_q[7]_lut_out = ((T1_q[7] $ (V1_q[7] & T1L15) & V1L10) # (D1_output[7] & !V1L10)) & VCC;
T1_q[7] = DFFEA(T1_q[7]_lut_out, CLOCK, !RESET, , , , );

--T1L33Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[7]~0
--operation mode is clrb_cntr

T1L33Q = T1_q[7];


--T1_q[6] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[6]
--operation mode is clrb_cntr

T1_q[6]_lut_out = ((T1_q[6] $ (V1_q[7] & T1L13) & V1L10) # (D1_output[6] & !V1L10)) & VCC;
T1_q[6] = DFFEA(T1_q[6]_lut_out, CLOCK, !RESET, , , , );

--T1L31Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[6]~1
--operation mode is clrb_cntr

T1L31Q = T1_q[6];

--T1L15 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[6]~COUT
--operation mode is clrb_cntr

T1L15 = CARRY(T1_q[6] & (T1L13));


--T1_q[5] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[5]
--operation mode is clrb_cntr

T1_q[5]_lut_out = ((T1_q[5] $ (V1_q[7] & T1L11) & V1L10) # (D1_output[5] & !V1L10)) & VCC;
T1_q[5] = DFFEA(T1_q[5]_lut_out, CLOCK, !RESET, , , , );

--T1L29Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[5]~2
--operation mode is clrb_cntr

T1L29Q = T1_q[5];

--T1L13 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[5]~COUT
--operation mode is clrb_cntr

T1L13 = CARRY(T1_q[5] & (T1L11));


--T1_q[4] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[4]
--operation mode is clrb_cntr

T1_q[4]_lut_out = ((T1_q[4] $ (V1_q[7] & T1L9) & V1L10) # (D1_output[4] & !V1L10)) & VCC;
T1_q[4] = DFFEA(T1_q[4]_lut_out, CLOCK, !RESET, , , , );

--T1L27Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[4]~3
--operation mode is clrb_cntr

T1L27Q = T1_q[4];

--T1L11 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[4]~COUT
--operation mode is clrb_cntr

T1L11 = CARRY(T1_q[4] & (T1L9));


--T1_q[3] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[3]
--operation mode is clrb_cntr

T1_q[3]_lut_out = ((T1_q[3] $ (V1_q[7] & T1L7) & V1L10) # (D1_output[3] & !V1L10)) & VCC;
T1_q[3] = DFFEA(T1_q[3]_lut_out, CLOCK, !RESET, , , , );

--T1L25Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[3]~4
--operation mode is clrb_cntr

T1L25Q = T1_q[3];

--T1L9 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[3]~COUT
--operation mode is clrb_cntr

T1L9 = CARRY(T1_q[3] & (T1L7));


--T1_q[2] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[2]
--operation mode is clrb_cntr

T1_q[2]_lut_out = ((T1_q[2] $ (V1_q[7] & T1L5) & V1L10) # (D1_output[2] & !V1L10)) & VCC;
T1_q[2] = DFFEA(T1_q[2]_lut_out, CLOCK, !RESET, , , , );

--T1L23Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[2]~5
--operation mode is clrb_cntr

T1L23Q = T1_q[2];

--T1L7 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[2]~COUT
--operation mode is clrb_cntr

T1L7 = CARRY(T1_q[2] & (T1L5));


--T1_q[1] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[1]
--operation mode is clrb_cntr

T1_q[1]_lut_out = ((T1_q[1] $ (V1_q[7] & T1L3) & V1L10) # (D1_output[1] & !V1L10)) & VCC;
T1_q[1] = DFFEA(T1_q[1]_lut_out, CLOCK, !RESET, , , , );

--T1L21Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[1]~6
--operation mode is clrb_cntr

T1L21Q = T1_q[1];

--T1L5 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT
--operation mode is clrb_cntr

T1L5 = CARRY(T1_q[1] & (T1L3));


--T1_q[0] is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[0]
--operation mode is clrb_cntr

T1_q[0]_lut_out = ((V1_q[7] $ T1_q[0] & V1L10) # (D1_output[0] & !V1L10)) & VCC;
T1_q[0] = DFFEA(T1_q[0]_lut_out, CLOCK, !RESET, , , , );

--T1L19Q is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|q[0]~7
--operation mode is clrb_cntr

T1L19Q = T1_q[0];

--T1L3 is PC:inst20|lpm_counter:output_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT
--operation mode is clrb_cntr