cpu.fnsim.qmsg

来自「实现了CPU的基本功能」· QMSG 代码 · 共 41 行 · 第 1/2 页

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Functional Simulation Netlist Generation Quartus II " "Info: Running Quartus II Functional Simulation Netlist Generation" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 5.1 Build 176 10/26/2005 SJ Full Version " "Info: Version 5.1 Build 176 10/26/2005 SJ Full Version" {  } {  } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Sun May 04 10:16:37 2008 " "Info: Processing started: Sun May 04 10:16:37 2008" {  } {  } 0 0 "Processing started: %1!s!" 0 0}  } {  } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off cpu -c cpu --generate_functional_sim_netlist " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off cpu -c cpu --generate_functional_sim_netlist" {  } {  } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ram.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ram.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ram-SYN " "Info: Found design unit 1: ram-SYN" {  } { { "ram.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ram.vhd" 51 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ram " "Info: Found entity 1: ram" {  } { { "ram.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ram.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "rom.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file rom.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 rom-SYN " "Info: Found design unit 1: rom-SYN" {  } { { "rom.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/rom.vhd" 48 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 rom " "Info: Found entity 1: rom" {  } { { "rom.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/rom.vhd" 39 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "sequence.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file sequence.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sequence-sequence_arc " "Info: Found design unit 1: sequence-sequence_arc" {  } { { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 13 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sequence " "Info: Found entity 1: sequence" {  } { { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ALU.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file ALU.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 ALU-ALU_arc " "Info: Found design unit 1: ALU-ALU_arc" {  } { { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 12 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 ALU " "Info: Found entity 1: ALU" {  } { { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "BR.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file BR.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 BR-BR_arc " "Info: Found design unit 1: BR-BR_arc" {  } { { "BR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/BR.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 BR " "Info: Found entity 1: BR" {  } { { "BR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/BR.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "cpu.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file cpu.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 cpu " "Info: Found entity 1: cpu" {  } { { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "IR.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file IR.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 IR-IR_arc " "Info: Found design unit 1: IR-IR_arc" {  } { { "IR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/IR.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 IR " "Info: Found entity 1: IR" {  } { { "IR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/IR.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "MAR.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file MAR.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 MAR-MAR_arc " "Info: Found design unit 1: MAR-MAR_arc" {  } { { "MAR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/MAR.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 MAR " "Info: Found entity 1: MAR" {  } { { "MAR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/MAR.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "MBR.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file MBR.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 MBR-MBR_arc " "Info: Found design unit 1: MBR-MBR_arc" {  } { { "MBR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/MBR.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 MBR " "Info: Found entity 1: MBR" {  } { { "MBR.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/MBR.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "PC.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file PC.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 PC-PC_arc " "Info: Found design unit 1: PC-PC_arc" {  } { { "PC.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/PC.vhd" 10 -1 0 } }  } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 PC " "Info: Found entity 1: PC" {  } { { "PC.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/PC.vhd" 4 -1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "ramtest.bdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file ramtest.bdf" { { "Info" "ISGN_ENTITY_NAME" "1 ramtest " "Info: Found entity 1: ramtest" {  } { { "ramtest.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/ramtest.bdf" { } } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "cpu " "Info: Elaborating entity \"cpu\" for the top level hierarchy" {  } {  } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ALU ALU:inst " "Info: Elaborating entity \"ALU\" for hierarchy \"ALU:inst\"" {  } { { "cpu.bdf" "inst" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 216 912 1120 344 "inst" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "BR BR:inst21 " "Info: Elaborating entity \"BR\" for hierarchy \"BR:inst21\"" {  } { { "cpu.bdf" "inst21" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 208 536 744 336 "inst21" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "rom rom:inst24 " "Info: Elaborating entity \"rom\" for hierarchy \"rom:inst24\"" {  } { { "cpu.bdf" "inst24" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 368 1192 1352 432 "inst24" "" } } } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/program files/libraries/megafunctions/lpm_rom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/program files/libraries/megafunctions/lpm_rom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 lpm_rom " "Info: Found entity 1: lpm_rom" {  } { { "lpm_rom.tdf" "" { Text "d:/program files/libraries/megafunctions/lpm_rom.tdf" 41 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "lpm_rom rom:inst24\|lpm_rom:lpm_rom_component " "Info: Elaborating entity \"lpm_rom\" for hierarchy \"rom:inst24\|lpm_rom:lpm_rom_component\"" {  } { { "rom.vhd" "lpm_rom_component" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/rom.vhd" 73 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "d:/program files/libraries/megafunctions/altrom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file d:/program files/libraries/megafunctions/altrom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altrom " "Info: Found entity 1: altrom" {  } { { "altrom.tdf" "" { Text "d:/program files/libraries/megafunctions/altrom.tdf" 75 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}