cpu.tan.qmsg

实现了CPU的基本功能

{ "Info" "ITDB_TH_RESULT" "ALU:inst\|temp_mr\[12\] RESET CLOCK -2.300 ns register " "Info: th for register \"ALU:inst\|temp_mr\[12\]\" (data pin = \"RESET\", clock pin = \"CLOCK\") is -2.300 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK destination 3.900 ns + Longest register " "Info: + Longest clock path from clock \"CLOCK\" to destination register is 3.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns CLOCK 1 CLK PIN_79 453 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_79; Fanout = 453; CLK Node = 'CLOCK'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { CLOCK } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 224 -616 -448 240 "CLOCK" "" } { 112 96 152 128 "CLOCK" "" } { 336 104 152 352 "CLOCK" "" } { 96 480 527 112 "CLOCK" "" } { 248 858 912 264 "CLOCK" "" } { 216 -448 -144 232 "CLOCK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(0.000 ns) 3.900 ns ALU:inst\|temp_mr\[12\] 2 REG LC5_C23 3 " "Info: 2: + IC(2.000 ns) + CELL(0.000 ns) = 3.900 ns; Loc. = LC5_C23; Fanout = 3; REG Node = 'ALU:inst\|temp_mr\[12\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { CLOCK ALU:inst|temp_mr[12] } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.900 ns ( 48.72 % ) " "Info: Total cell delay = 1.900 ns ( 48.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns ( 51.28 % ) " "Info: Total interconnect delay = 2.000 ns ( 51.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|temp_mr[12] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|temp_mr[12] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TH_DELAY" "1.400 ns + " "Info: + Micro hold delay of destination is 1.400 ns" {  } { { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro hold delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "7.600 ns - Shortest pin register " "Info: - Shortest pin to register delay is 7.600 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns RESET 1 PIN PIN_184 85 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_184; Fanout = 85; PIN Node = 'RESET'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { RESET } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 104 -616 -448 120 "RESET" "" } { 320 104 152 336 "RESET" "" } { 80 490 536 96 "RESET" "" } { 232 848 904 248 "RESET" "" } { 96 -448 152 112 "RESET" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.500 ns) + CELL(1.400 ns) 4.800 ns ALU:inst\|temp_dr\[15\]~495 2 COMB LC3_C24 65 " "Info: 2: + IC(1.500 ns) + CELL(1.400 ns) = 4.800 ns; Loc. = LC3_C24; Fanout = 65; COMB Node = 'ALU:inst\|temp_dr\[15\]~495'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.900 ns" { RESET ALU:inst|temp_dr[15]~495 } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(1.000 ns) 7.600 ns ALU:inst\|temp_mr\[12\] 3 REG LC5_C23 3 " "Info: 3: + IC(1.800 ns) + CELL(1.000 ns) = 7.600 ns; Loc. = LC5_C23; Fanout = 3; REG Node = 'ALU:inst\|temp_mr\[12\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.800 ns" { ALU:inst|temp_dr[15]~495 ALU:inst|temp_mr[12] } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.300 ns ( 56.58 % ) " "Info: Total cell delay = 4.300 ns ( 56.58 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.300 ns ( 43.42 % ) " "Info: Total interconnect delay = 3.300 ns ( 43.42 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "7.600 ns" { RESET ALU:inst|temp_dr[15]~495 ALU:inst|temp_mr[12] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "7.600 ns" { RESET RESET~out ALU:inst|temp_dr[15]~495 ALU:inst|temp_mr[12] } { 0.000ns 0.000ns 1.500ns 1.800ns } { 0.000ns 1.900ns 1.400ns 1.000ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|temp_mr[12] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|temp_mr[12] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } } { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "7.600 ns" { RESET ALU:inst|temp_dr[15]~495 ALU:inst|temp_mr[12] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "7.600 ns" { RESET RESET~out ALU:inst|temp_dr[15]~495 ALU:inst|temp_mr[12] } { 0.000ns 0.000ns 1.500ns 1.800ns } { 0.000ns 1.900ns 1.400ns 1.000ns } } }  } 0 0 "th for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Sun May 04 10:16:27 2008 " "Info: Processing ended: Sun May 04 10:16:27 2008" {  } {  } 0 0 "Processing ended: %1!s!" 0 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:02 " "Info: Elapsed time: 00:00:02" {  } {  } 0 0 "Elapsed time: %1!s!" 0 0}  } {  } 0 0 "%6!s! %1!s! was successful. %2!d! error%3!s!, %4!d! warning%5!s!" 0 0}