cpu.tan.qmsg

实现了CPU的基本功能

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "CLOCK register sequence:inst23\|CAR\[5\] register ALU:inst\|FLAGS\[1\] 20.75 MHz 48.2 ns Internal " "Info: Clock \"CLOCK\" has Internal fmax of 20.75 MHz between source register \"sequence:inst23\|CAR\[5\]\" and destination register \"ALU:inst\|FLAGS\[1\]\" (period= 48.2 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "46.000 ns + Longest register register " "Info: + Longest register to register delay is 46.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sequence:inst23\|CAR\[5\] 1 REG LC1_C11 30 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_C11; Fanout = 30; REG Node = 'sequence:inst23\|CAR\[5\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.100 ns) + CELL(10.200 ns) 16.300 ns rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[16\]~mem_cell_ra0 2 MEM EC6_D 1 " "Info: 2: + IC(6.100 ns) + CELL(10.200 ns) = 16.300 ns; Loc. = EC6_D; Fanout = 1; MEM Node = 'rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[16\]~mem_cell_ra0'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "16.300 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16]~mem_cell_ra0 } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/program files/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 18.300 ns rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[16\] 3 MEM EC6_D 10 " "Info: 3: + IC(0.000 ns) + CELL(2.000 ns) = 18.300 ns; Loc. = EC6_D; Fanout = 10; MEM Node = 'rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[16\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16] } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/program files/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.700 ns) + CELL(1.900 ns) 22.900 ns rtl~874 4 COMB LC6_D19 4 " "Info: 4: + IC(2.700 ns) + CELL(1.900 ns) = 22.900 ns; Loc. = LC6_D19; Fanout = 4; COMB Node = 'rtl~874'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "4.600 ns" { rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16] rtl~874 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(1.400 ns) 26.100 ns rtl~876 5 COMB LC5_D13 6 " "Info: 5: + IC(1.800 ns) + CELL(1.400 ns) = 26.100 ns; Loc. = LC5_D13; Fanout = 6; COMB Node = 'rtl~876'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.200 ns" { rtl~874 rtl~876 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.600 ns) + CELL(1.400 ns) 28.100 ns rtl~879 6 COMB LC2_D13 3 " "Info: 6: + IC(0.600 ns) + CELL(1.400 ns) = 28.100 ns; Loc. = LC2_D13; Fanout = 3; COMB Node = 'rtl~879'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { rtl~876 rtl~879 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.800 ns) + CELL(1.900 ns) 32.800 ns ALU:inst\|Select~20468 7 COMB LC6_B13 33 " "Info: 7: + IC(2.800 ns) + CELL(1.900 ns) = 32.800 ns; Loc. = LC6_B13; Fanout = 33; COMB Node = 'ALU:inst\|Select~20468'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "4.700 ns" { rtl~879 ALU:inst|Select~20468 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(3.000 ns) + CELL(1.900 ns) 37.700 ns ALU:inst\|Select~20673 8 COMB LC1_B11 2 " "Info: 8: + IC(3.000 ns) + CELL(1.900 ns) = 37.700 ns; Loc. = LC1_B11; Fanout = 2; COMB Node = 'ALU:inst\|Select~20673'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "4.900 ns" { ALU:inst|Select~20468 ALU:inst|Select~20673 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.800 ns) + CELL(1.400 ns) 40.900 ns rtl~940 9 COMB LC5_B12 1 " "Info: 9: + IC(1.800 ns) + CELL(1.400 ns) = 40.900 ns; Loc. = LC5_B12; Fanout = 1; COMB Node = 'rtl~940'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.200 ns" { ALU:inst|Select~20673 rtl~940 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.300 ns) 42.200 ns rtl~905 10 COMB LC6_B12 1 " "Info: 10: + IC(0.000 ns) + CELL(1.300 ns) = 42.200 ns; Loc. = LC6_B12; Fanout = 1; COMB Node = 'rtl~905'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "1.300 ns" { rtl~940 rtl~905 } "NODE_NAME" } "" } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.400 ns) + CELL(1.400 ns) 46.000 ns ALU:inst\|FLAGS\[1\] 11 REG LC5_B14 6 " "Info: 11: + IC(2.400 ns) + CELL(1.400 ns) = 46.000 ns; Loc. = LC5_B14; Fanout = 6; REG Node = 'ALU:inst\|FLAGS\[1\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.800 ns" { rtl~905 ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "24.800 ns ( 53.91 % ) " "Info: Total cell delay = 24.800 ns ( 53.91 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "21.200 ns ( 46.09 % ) " "Info: Total interconnect delay = 21.200 ns ( 46.09 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "46.000 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16] rtl~874 rtl~876 rtl~879 ALU:inst|Select~20468 ALU:inst|Select~20673 rtl~940 rtl~905 ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "46.000 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16] rtl~874 rtl~876 rtl~879 ALU:inst|Select~20468 ALU:inst|Select~20673 rtl~940 rtl~905 ALU:inst|FLAGS[1] } { 0.000ns 6.100ns 0.000ns 2.700ns 1.800ns 0.600ns 2.800ns 3.000ns 1.800ns 0.000ns 2.400ns } { 0.000ns 10.200ns 2.000ns 1.900ns 1.400ns 1.400ns 1.900ns 1.900ns 1.400ns 1.300ns 1.400ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK destination 3.900 ns + Shortest register " "Info: + Shortest clock path from clock \"CLOCK\" to destination register is 3.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns CLOCK 1 CLK PIN_79 453 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_79; Fanout = 453; CLK Node = 'CLOCK'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { CLOCK } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 224 -616 -448 240 "CLOCK" "" } { 112 96 152 128 "CLOCK" "" } { 336 104 152 352 "CLOCK" "" } { 96 480 527 112 "CLOCK" "" } { 248 858 912 264 "CLOCK" "" } { 216 -448 -144 232 "CLOCK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(0.000 ns) 3.900 ns ALU:inst\|FLAGS\[1\] 2 REG LC5_B14 6 " "Info: 2: + IC(2.000 ns) + CELL(0.000 ns) = 3.900 ns; Loc. = LC5_B14; Fanout = 6; REG Node = 'ALU:inst\|FLAGS\[1\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { CLOCK ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.900 ns ( 48.72 % ) " "Info: Total cell delay = 1.900 ns ( 48.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns ( 51.28 % ) " "Info: Total interconnect delay = 2.000 ns ( 51.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|FLAGS[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK source 3.900 ns - Longest register " "Info: - Longest clock path from clock \"CLOCK\" to source register is 3.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns CLOCK 1 CLK PIN_79 453 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_79; Fanout = 453; CLK Node = 'CLOCK'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { CLOCK } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 224 -616 -448 240 "CLOCK" "" } { 112 96 152 128 "CLOCK" "" } { 336 104 152 352 "CLOCK" "" } { 96 480 527 112 "CLOCK" "" } { 248 858 912 264 "CLOCK" "" } { 216 -448 -144 232 "CLOCK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(0.000 ns) 3.900 ns sequence:inst23\|CAR\[5\] 2 REG LC1_C11 30 " "Info: 2: + IC(2.000 ns) + CELL(0.000 ns) = 3.900 ns; Loc. = LC1_C11; Fanout = 30; REG Node = 'sequence:inst23\|CAR\[5\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.900 ns ( 48.72 % ) " "Info: Total cell delay = 1.900 ns ( 48.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns ( 51.28 % ) " "Info: Total interconnect delay = 2.000 ns ( 51.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out sequence:inst23|CAR[5] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|FLAGS[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } } { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out sequence:inst23|CAR[5] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.900 ns + " "Info: + Micro clock to output delay of source is 0.900 ns" {  } { { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 17 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "1.300 ns + " "Info: + Micro setup delay of destination is 1.300 ns" {  } { { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "46.000 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16] rtl~874 rtl~876 rtl~879 ALU:inst|Select~20468 ALU:inst|Select~20673 rtl~940 rtl~905 ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "46.000 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[16] rtl~874 rtl~876 rtl~879 ALU:inst|Select~20468 ALU:inst|Select~20673 rtl~940 rtl~905 ALU:inst|FLAGS[1] } { 0.000ns 6.100ns 0.000ns 2.700ns 1.800ns 0.600ns 2.800ns 3.000ns 1.800ns 0.000ns 2.400ns } { 0.000ns 10.200ns 2.000ns 1.900ns 1.400ns 1.400ns 1.900ns 1.900ns 1.400ns 1.300ns 1.400ns } } } { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|FLAGS[1] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|FLAGS[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } } { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out sequence:inst23|CAR[5] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "ALU:inst\|counter\[13\] RESET CLOCK 9.300 ns register " "Info: tsu for register \"ALU:inst\|counter\[13\]\" (data pin = \"RESET\", clock pin = \"CLOCK\") is 9.300 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.900 ns + Longest pin register " "Info: + Longest pin to register delay is 11.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns RESET 1 PIN PIN_184 85 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_184; Fanout = 85; PIN Node = 'RESET'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { RESET } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 104 -616 -448 120 "RESET" "" } { 320 104 152 336 "RESET" "" } { 80 490 536 96 "RESET" "" } { 232 848 904 248 "RESET" "" } { 96 -448 152 112 "RESET" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.500 ns) + CELL(1.400 ns) 4.800 ns ALU:inst\|temp_dr\[15\]~495 2 COMB LC3_C24 65 " "Info: 2: + IC(1.500 ns) + CELL(1.400 ns) = 4.800 ns; Loc. = LC3_C24; Fanout = 65; COMB Node = 'ALU:inst\|temp_dr\[15\]~495'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.900 ns" { RESET ALU:inst|temp_dr[15]~495 } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.100 ns) + CELL(1.000 ns) 11.900 ns ALU:inst\|counter\[13\] 3 REG LC5_B8 3 " "Info: 3: + IC(6.100 ns) + CELL(1.000 ns) = 11.900 ns; Loc. = LC5_B8; Fanout = 3; REG Node = 'ALU:inst\|counter\[13\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "7.100 ns" { ALU:inst|temp_dr[15]~495 ALU:inst|counter[13] } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.300 ns ( 36.13 % ) " "Info: Total cell delay = 4.300 ns ( 36.13 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "7.600 ns ( 63.87 % ) " "Info: Total interconnect delay = 7.600 ns ( 63.87 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "11.900 ns" { RESET ALU:inst|temp_dr[15]~495 ALU:inst|counter[13] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "11.900 ns" { RESET RESET~out ALU:inst|temp_dr[15]~495 ALU:inst|counter[13] } { 0.000ns 0.000ns 1.500ns 6.100ns } { 0.000ns 1.900ns 1.400ns 1.000ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "1.300 ns + " "Info: + Micro setup delay of destination is 1.300 ns" {  } { { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK destination 3.900 ns - Shortest register " "Info: - Shortest clock path from clock \"CLOCK\" to destination register is 3.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns CLOCK 1 CLK PIN_79 453 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_79; Fanout = 453; CLK Node = 'CLOCK'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { CLOCK } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 224 -616 -448 240 "CLOCK" "" } { 112 96 152 128 "CLOCK" "" } { 336 104 152 352 "CLOCK" "" } { 96 480 527 112 "CLOCK" "" } { 248 858 912 264 "CLOCK" "" } { 216 -448 -144 232 "CLOCK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(0.000 ns) 3.900 ns ALU:inst\|counter\[13\] 2 REG LC5_B8 3 " "Info: 2: + IC(2.000 ns) + CELL(0.000 ns) = 3.900 ns; Loc. = LC5_B8; Fanout = 3; REG Node = 'ALU:inst\|counter\[13\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { CLOCK ALU:inst|counter[13] } "NODE_NAME" } "" } } { "ALU.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/ALU.vhd" 21 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.900 ns ( 48.72 % ) " "Info: Total cell delay = 1.900 ns ( 48.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns ( 51.28 % ) " "Info: Total interconnect delay = 2.000 ns ( 51.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|counter[13] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|counter[13] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "11.900 ns" { RESET ALU:inst|temp_dr[15]~495 ALU:inst|counter[13] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "11.900 ns" { RESET RESET~out ALU:inst|temp_dr[15]~495 ALU:inst|counter[13] } { 0.000ns 0.000ns 1.500ns 6.100ns } { 0.000ns 1.900ns 1.400ns 1.000ns } } } { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK ALU:inst|counter[13] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out ALU:inst|counter[13] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "CLOCK C\[15\] sequence:inst23\|CAR\[5\] 31.500 ns register " "Info: tco from clock \"CLOCK\" to destination pin \"C\[15\]\" through register \"sequence:inst23\|CAR\[5\]\" is 31.500 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "CLOCK source 3.900 ns + Longest register " "Info: + Longest clock path from clock \"CLOCK\" to source register is 3.900 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.900 ns) 1.900 ns CLOCK 1 CLK PIN_79 453 " "Info: 1: + IC(0.000 ns) + CELL(1.900 ns) = 1.900 ns; Loc. = PIN_79; Fanout = 453; CLK Node = 'CLOCK'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { CLOCK } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 224 -616 -448 240 "CLOCK" "" } { 112 96 152 128 "CLOCK" "" } { 336 104 152 352 "CLOCK" "" } { 96 480 527 112 "CLOCK" "" } { 248 858 912 264 "CLOCK" "" } { 216 -448 -144 232 "CLOCK" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(0.000 ns) 3.900 ns sequence:inst23\|CAR\[5\] 2 REG LC1_C11 30 " "Info: 2: + IC(2.000 ns) + CELL(0.000 ns) = 3.900 ns; Loc. = LC1_C11; Fanout = 30; REG Node = 'sequence:inst23\|CAR\[5\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.900 ns ( 48.72 % ) " "Info: Total cell delay = 1.900 ns ( 48.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns ( 51.28 % ) " "Info: Total interconnect delay = 2.000 ns ( 51.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out sequence:inst23|CAR[5] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.900 ns + " "Info: + Micro clock to output delay of source is 0.900 ns" {  } { { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 17 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "26.700 ns + Longest register pin " "Info: + Longest register to pin delay is 26.700 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns sequence:inst23\|CAR\[5\] 1 REG LC1_C11 30 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC1_C11; Fanout = 30; REG Node = 'sequence:inst23\|CAR\[5\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "" { sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "sequence.vhd" "" { Text "C:/Documents and Settings/胡敏霞/桌面/cpu1/sequence.vhd" 17 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.100 ns) + CELL(10.200 ns) 16.300 ns rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[15\]~mem_cell_ra0 2 MEM EC3_D 1 " "Info: 2: + IC(6.100 ns) + CELL(10.200 ns) = 16.300 ns; Loc. = EC3_D; Fanout = 1; MEM Node = 'rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[15\]~mem_cell_ra0'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "16.300 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15]~mem_cell_ra0 } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/program files/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 18.300 ns rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[15\] 3 MEM EC3_D 10 " "Info: 3: + IC(0.000 ns) + CELL(2.000 ns) = 18.300 ns; Loc. = EC3_D; Fanout = 10; MEM Node = 'rom:inst24\|lpm_rom:lpm_rom_component\|altrom:srom\|q\[15\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "2.000 ns" { rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15] } "NODE_NAME" } "" } } { "altrom.tdf" "" { Text "d:/program files/libraries/megafunctions/altrom.tdf" 80 2 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(4.500 ns) + CELL(3.900 ns) 26.700 ns C\[15\] 4 PIN PIN_27 0 " "Info: 4: + IC(4.500 ns) + CELL(3.900 ns) = 26.700 ns; Loc. = PIN_27; Fanout = 0; PIN Node = 'C\[15\]'" {  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "8.400 ns" { rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15] C[15] } "NODE_NAME" } "" } } { "cpu.bdf" "" { Schematic "C:/Documents and Settings/胡敏霞/桌面/cpu1/cpu.bdf" { { 392 1496 1672 408 "C\[25..0\]" "" } { 128 96 152 144 "C\[3\]" "" } { 144 96 152 160 "C\[11\]" "" } { 352 104 152 368 "C\[5\]" "" } { 368 104 152 384 "C\[8\]" "" } { 112 480 536 128 "C\[6\]" "" } { 128 480 536 144 "C\[7\]" "" } { 256 496 536 272 "C\[10\]" "" } { 464 856 912 480 "C\[2..0\]" "" } { 432 856 912 448 "C\[24\]" "" } { 448 856 912 464 "C\[25\]" "" } { 296 848 912 312 "C\[23..12\]" "" } { 400 464 504 416 "C\[9\]" "" } { 384 1352 1496 400 "C\[25..0\]" "" } { 184 -216 -144 200 "C\[4\]" "" } } } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "16.100 ns ( 60.30 % ) " "Info: Total cell delay = 16.100 ns ( 60.30 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "10.600 ns ( 39.70 % ) " "Info: Total interconnect delay = 10.600 ns ( 39.70 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "26.700 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15] C[15] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "26.700 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15] C[15] } { 0.000ns 6.100ns 0.000ns 4.500ns } { 0.000ns 10.200ns 2.000ns 3.900ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "3.900 ns" { CLOCK sequence:inst23|CAR[5] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "3.900 ns" { CLOCK CLOCK~out sequence:inst23|CAR[5] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 1.900ns 0.000ns } } } { "d:/program files/bin/Report_Window_01.qrpt" "" { Report "d:/program files/bin/Report_Window_01.qrpt" "Compiler" "cpu" "UNKNOWN" "V1" "C:/Documents and Settings/胡敏霞/桌面/cpu1/db/cpu.quartus_db" { Floorplan "C:/Documents and Settings/胡敏霞/桌面/cpu1/" "" "26.700 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15] C[15] } "NODE_NAME" } "" } } { "d:/program files/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/program files/bin/Technology_Viewer.qrui" "26.700 ns" { sequence:inst23|CAR[5] rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15]~mem_cell_ra0 rom:inst24|lpm_rom:lpm_rom_component|altrom:srom|q[15] C[15] } { 0.000ns 6.100ns 0.000ns 4.500ns } { 0.000ns 10.200ns 2.000ns 3.900ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}