infrared_receive.tan.qmsg

接收解码用VHDL语言编写程序

{ "Info" "ITDB_FULL_MIN_TCO_RESULT" "clk light\[1\] display:u4\|light\[1\]~reg0 6.877 ns register " "Info: Minimum tco from clock clk to destination pin light\[1\] through register display:u4\|light\[1\]~reg0 is 6.877 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.659 ns + Shortest register " "Info: + Shortest clock path from clock clk to source register is 2.659 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.619 ns) 0.619 ns clk 1 CLK Pin_L2 79 " "Info: 1: + IC(0.000 ns) + CELL(0.619 ns) = 0.619 ns; Loc. = Pin_L2; Fanout = 79; CLK Node = 'clk'" {  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "" { clk } "NODE_NAME" } } } { "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" "" "" { Text "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" 6 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.498 ns) + CELL(0.542 ns) 2.659 ns display:u4\|light\[1\]~reg0 2 REG LC_X27_Y22_N6 8 " "Info: 2: + IC(1.498 ns) + CELL(0.542 ns) = 2.659 ns; Loc. = LC_X27_Y22_N6; Fanout = 8; REG Node = 'display:u4\|light\[1\]~reg0'" {  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "2.040 ns" { clk display:u4|light[1]~reg0 } "NODE_NAME" } } } { "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" "" "" { Text "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" 270 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.161 ns 43.66 % " "Info: Total cell delay = 1.161 ns ( 43.66 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.498 ns 56.34 % " "Info: Total interconnect delay = 1.498 ns ( 56.34 % )" {  } {  } 0}  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "2.659 ns" { clk display:u4|light[1]~reg0 } "NODE_NAME" } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.156 ns + " "Info: + Micro clock to output delay of source is 0.156 ns" {  } { { "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" "" "" { Text "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" 270 -1 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.062 ns + Shortest register pin " "Info: + Shortest register to pin delay is 4.062 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns display:u4\|light\[1\]~reg0 1 REG LC_X27_Y22_N6 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X27_Y22_N6; Fanout = 8; REG Node = 'display:u4\|light\[1\]~reg0'" {  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "" { display:u4|light[1]~reg0 } "NODE_NAME" } } } { "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" "" "" { Text "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" 270 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.443 ns) + CELL(2.619 ns) 4.062 ns light\[1\] 2 PIN Pin_D12 0 " "Info: 2: + IC(1.443 ns) + CELL(2.619 ns) = 4.062 ns; Loc. = Pin_D12; Fanout = 0; PIN Node = 'light\[1\]'" {  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "4.062 ns" { display:u4|light[1]~reg0 light[1] } "NODE_NAME" } } } { "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" "" "" { Text "G:/altera/homework/红外摇控接收(good)/infrared_receive.vhd" 9 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.619 ns 64.48 % " "Info: Total cell delay = 2.619 ns ( 64.48 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.443 ns 35.52 % " "Info: Total interconnect delay = 1.443 ns ( 35.52 % )" {  } {  } 0}  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "4.062 ns" { display:u4|light[1]~reg0 light[1] } "NODE_NAME" } } }  } 0}  } { { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "2.659 ns" { clk display:u4|light[1]~reg0 } "NODE_NAME" } } } { "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" "" "" { Report "G:/altera/homework/红外摇控接收(good)/db/infrared_receive_cmp.qrpt" Compiler "infrared_receive" "UNKNOWN" "V1" "G:/altera/homework/红外摇控接收(good)/db/infrared_receive.quartus_db" { Floorplan "" "" "4.062 ns" { display:u4|light[1]~reg0 light[1] } "NODE_NAME" } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Tue Jan 30 16:46:09 2007 " "Info: Processing ended: Tue Jan 30 16:46:09 2007" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:00 " "Info: Elapsed time: 00:00:00" {  } {  } 0}  } {  } 0}