hdpdeps.ref

这是一个用VHDL写的简易的CPU的程序

V1 27
FL D:/sum/cu.vhd 2007/11/16.15:23:10
EN work/CU              FL D:/sum/cu.vhd  PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/CU/MAIN         FL D:/sum/cu.vhd  EN work/CU
FL e:/sum/cu.vhd 2007/10/30.21:17:28
FL D:/sum/ieu.vhdl 2007/11/16.15:21:02
EN work/IEU             FL D:/sum/ieu.vhdl PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/IEU/MAIN        FL D:/sum/ieu.vhdl EN work/IEU
FL e:/sum/sum.vhdl 2007/11/15.21:29:14
FL D:/sum/msi.vhdl 2007/11/07.17:33:36
EN work/MSI             FL D:/sum/msi.vhdl PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/MSI/MAIN        FL D:/sum/msi.vhdl EN work/MSI
FL d:/sum/clock.vhdl 2007/11/16.15:23:10
FL d:/sum/sum.vhdl 2007/11/21.17:24:38
FL e:/sum/ieu.vhdl 2007/11/15.17:25:54
FL e:/sum/msi.vhdl 2007/11/07.17:33:36
FL D:/sum/clock.vhdl 2007/11/16.15:23:10
EN work/CLOCK           FL D:/sum/clock.vhdl PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED
AR work/CLOCK/MAIN      FL D:/sum/clock.vhdl EN work/CLOCK
FL e:/sum/clock.vhdl 2007/11/15.17:25:54
FL D:/sum/sum.vhdl 2007/11/23.13:44:52
EN work/SUM             FL D:/sum/sum.vhdl PB ieee/STD_LOGIC_1164 \
      PB ieee/STD_LOGIC_ARITH PB ieee/STD_LOGIC_UNSIGNED PH unisim/VCOMPONENTS
AR work/SUM/BEHAV       FL D:/sum/sum.vhdl EN work/SUM      CP CLOCK          CP CU \
      CP IEU            CP MSI            CP BUFGP