_primary.vhd

来自「该工具用于使用MAXII CPLD实现了Target I2C功能,例程很全,包括」· VHDL 代码 · 共 13 行

library verilog;
use verilog.vl_types.all;
entity write is
    port(
        clk             : in     vl_logic;
        cap_a           : inout  vl_logic;
        cap_b           : inout  vl_logic;
        ctrl_w          : in     vl_logic;
        nxt_state_a     : in     vl_logic;
        nxt_state_b     : in     vl_logic
    );
end write;