lcd_v.tan.rpt

我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 LCD模块的程序

+-------------------------------------------------------+--------------------+------+----+-------------+


+-------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Settings Summary                                                                                                                                                                          ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; Clock Node Name              ; Clock Setting Name ; Type     ; Fmax Requirement ; Early Latency ; Late Latency ; Based on ; Multiply Base Fmax by ; Divide Base Fmax by ; Offset ; Phase offset ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+
; mclk                         ;                    ; User Pin ; NONE             ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
; altera_internal_jtag~TCKUTAP ;                    ; User Pin ; NONE             ; 0.000 ns      ; 0.000 ns     ; NONE     ; N/A                   ; N/A                 ; N/A    ;              ;
+------------------------------+--------------------+----------+------------------+---------------+--------------+----------+-----------------------+---------------------+--------+--------------+


+------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Clock Setup: 'mclk'                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                                  ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; Slack                                   ; Actual fmax (period)                                ; From                                                                                                                                                                              ; To                                                                                                                                                   ; From Clock ; To Clock ; Required Setup Relationship ; Required Longest P2P Time ; Actual Longest P2P Time ;
+-----------------------------------------+-----------------------------------------------------+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+------------------------------------------------------------------------------------------------------------------------------------------------------+------------+----------+-----------------------------+---------------------------+-------------------------+
; N/A                                     ; 48.66 MHz ( period = 20.552 ns )                    ; lcd:inst1|lcd_e                                                                                                                                                                   ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[14]                                                                                                ; mclk       ; mclk     ; None                        ; None                      ; 0.675 ns                ;
; N/A                                     ; 58.41 MHz ( period = 17.120 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[4]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.738 ns                ;
; N/A                                     ; 58.47 MHz ( period = 17.104 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[6]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.692 ns                ;
; N/A                                     ; 58.71 MHz ( period = 17.034 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[1]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.620 ns                ;
; N/A                                     ; 58.71 MHz ( period = 17.033 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[5]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.651 ns                ;
; N/A                                     ; 58.73 MHz ( period = 17.026 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[3]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.612 ns                ;
; N/A                                     ; 59.63 MHz ( period = 16.771 ns )                    ; lcd:inst1|data[3]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[3]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.357 ns                ;
; N/A                                     ; 60.60 MHz ( period = 16.501 ns )                    ; lcd:inst1|data[6]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[6]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 2.089 ns                ;
; N/A                                     ; 61.43 MHz ( period = 16.280 ns )                    ; lcd:inst1|data[0]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[0]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.866 ns                ;
; N/A                                     ; 61.53 MHz ( period = 16.251 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[0]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.837 ns                ;
; N/A                                     ; 62.29 MHz ( period = 16.054 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[7]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.642 ns                ;
; N/A                                     ; 63.15 MHz ( period = 15.836 ns )                    ; lcd:inst1|address[0]                                                                                                                                                              ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[8]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.424 ns                ;
; N/A                                     ; 63.19 MHz ( period = 15.825 ns )                    ; lcd:inst1|address[2]                                                                                                                                                              ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[10]                                                                                                ; mclk       ; mclk     ; None                        ; None                      ; 1.411 ns                ;
; N/A                                     ; 63.19 MHz ( period = 15.825 ns )                    ; lcd:inst1|address[1]                                                                                                                                                              ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[9]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.413 ns                ;
; N/A                                     ; 63.46 MHz ( period = 15.759 ns )                    ; lcd:inst1|address[4]                                                                                                                                                              ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[12]                                                                                                ; mclk       ; mclk     ; None                        ; None                      ; 1.327 ns                ;
; N/A                                     ; 63.54 MHz ( period = 15.738 ns )                    ; lcd:inst1|address[5]                                                                                                                                                              ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[13]                                                                                                ; mclk       ; mclk     ; None                        ; None                      ; 1.306 ns                ;
; N/A                                     ; 63.56 MHz ( period = 15.734 ns )                    ; lcd:inst1|address[3]                                                                                                                                                              ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[11]                                                                                                ; mclk       ; mclk     ; None                        ; None                      ; 1.302 ns                ;
; N/A                                     ; 64.32 MHz ( period = 15.547 ns )                    ; lcd:inst1|always4~0                                                                                                                                                               ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[2]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.115 ns                ;
; N/A                                     ; 64.72 MHz ( period = 15.450 ns )                    ; lcd:inst1|data[4]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[4]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 1.020 ns                ;
; N/A                                     ; 65.49 MHz ( period = 15.269 ns )                    ; lcd:inst1|data[5]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[5]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 0.839 ns                ;
; N/A                                     ; 65.51 MHz ( period = 15.265 ns )                    ; lcd:inst1|data[2]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[2]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 0.833 ns                ;
; N/A                                     ; 65.55 MHz ( period = 15.255 ns )                    ; lcd:inst1|data[1]~reg0                                                                                                                                                            ; sld_signaltap:auto_signaltap_0|acq_trigger_in_reg[1]                                                                                                 ; mclk       ; mclk     ; None                        ; None                      ; 0.823 ns                ;