stp1.stp

我买的红色飓风FPGA,EP1C6开发板的配套USBA实验例程 LCD模块的程序

          <wire connection_status="true" name="lcd:inst1|address[3]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="lcd:inst1|address[4]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="lcd:inst1|address[5]" tap_mode="classic" type="register"/>
          <wire connection_status="true" name="lcd_e" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="lcd_rs" tap_mode="classic" type="output pin"/>
          <wire connection_status="true" name="lcd_rw" tap_mode="classic" type="output pin"/>
        </data_input_vec>
      </signal_vec>
      <presentation>
        <setup_view>
          <bus is_signal_inverted="no" link="all" name="data" order="msb_to_lsb" radix="hex" state="collapse" type="output pin">
            <net is_signal_inverted="no" name="data[7]"/>
            <net is_signal_inverted="no" name="data[6]"/>
            <net is_signal_inverted="no" name="data[5]"/>
            <net is_signal_inverted="no" name="data[4]"/>
            <net is_signal_inverted="no" name="data[3]"/>
            <net is_signal_inverted="no" name="data[2]"/>
            <net is_signal_inverted="no" name="data[1]"/>
            <net is_signal_inverted="no" name="data[0]"/>
          </bus>
          <net is_signal_inverted="no" name="lcd_e"/>
          <net is_signal_inverted="no" name="lcd_rs"/>
          <net is_signal_inverted="no" name="lcd_rw"/>
          <bus is_signal_inverted="no" link="all" name="lcd:inst1|address" order="msb_to_lsb" radix="hex" state="collapse" type="register">
            <net is_signal_inverted="no" name="lcd:inst1|address[5]"/>
            <net is_signal_inverted="no" name="lcd:inst1|address[4]"/>
            <net is_signal_inverted="no" name="lcd:inst1|address[3]"/>
            <net is_signal_inverted="no" name="lcd:inst1|address[2]"/>
            <net is_signal_inverted="no" name="lcd:inst1|address[1]"/>
            <net is_signal_inverted="no" name="lcd:inst1|address[0]"/>
          </bus>
        </setup_view>
        <data_view>
          <bus is_signal_inverted="no" link="all" name="data" order="msb_to_lsb" radix="hex" state="collapse" type="output pin">
            <net is_signal_inverted="no" name="data[7]"/>
            <net is_signal_inverted="no" name="data[6]"/>
            <net is_signal_inverted="no" name="data[5]"/>
            <net is_signal_inverted="no" name="data[4]"/>
            <net is_signal_inverted="no" name="data[3]"/>
            <net is_signal_inverted="no" name="data[2]"/>
            <net is_signal_inverted="no" name="data[1]"/>
            <net is_signal_inverted="no" name="data[0]"/>