vga_bb.v

利用VERILOG编写的基于XILINX的SPARTAN板的VGA接口显示程序

module save (clka,dina,addra,wea,ssra,douta,clkb,dinb,addrb,web,doutb);
input clka;
input [0:0]dina;
input [14:0]addra;
input [0:0]wea;
input ssra;
output [0:0]douta;
input clkb;
input [0:0]dinb;
input [14:0]addrb;
input [0:0]web;
output [0:0]doutb;
endmodule