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来自「利用VERILOG编写的基于XILINX的SPARTAN板的VGA接口显示程序」· 代码 · 共 159 行

# Reading D:/modelsim/tcl/vsim/pref.tcl 
# //  ModelSim SE 6.1b Sep  8 2005 
# //
# //  Copyright Mentor Graphics Corporation 2005
# //              All Rights Reserved.
# //
# //  THIS WORK CONTAINS TRADE SECRET AND 
# //  PROPRIETARY INFORMATION WHICH IS THE PROPERTY
# //  OF MENTOR GRAPHICS CORPORATION OR ITS LICENSORS
# //  AND IS SUBJECT TO LICENSE TERMS.
# //
# do vgatest.fdo 
# ** Warning: (vlib-34) Library already exists at "work".
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module vs_hs
# 
# Top level modules:
# 	vs_hs
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module sendsave
# 
# Top level modules:
# 	sendsave
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module savecon
# 
# Top level modules:
# 	savecon
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module save
# 
# Top level modules:
# 	save
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module vga
# 
# Top level modules:
# 	vga
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module vgatest
# 
# Top level modules:
# 	vgatest
# Model Technology ModelSim SE vlog 6.1b Compiler 2005.09 Sep  8 2005
# -- Compiling module glbl
# 
# Top level modules:
# 	glbl
# vsim -L xilinxcorelib_ver -L unisims_ver -lib work -t 1ps vgatest glbl 
# Loading work.vgatest
# Loading work.vga
# Loading work.vs_hs
# Loading work.savecon
# Loading work.save
# Loading D:\modelsim\library\Xilinxcoreli_ver.BLK_MEM_GEN_V1_1
# Loading D:\modelsim\library\Xilinxcoreli_ver.BLK_MEM_GEN_V1_1_output_stage
# Loading work.sendsave
# Loading work.glbl
# ** Warning: (vsim-3017) vga.v(51): [TFMPC] - Too few port connections. Expected 11, found 9.
#         Region: /vgatest/UUT/m3
# ** Warning: (vsim-3722) vga.v(51): [TFMPC] - Missing connection for port 'dinb'.
# ** Warning: (vsim-3722) vga.v(51): [TFMPC] - Missing connection for port 'douta'.
# .main_pane.mdi.interior.cs.vm.paneset.cli_0.wf.clip.cs.pw.wf
# .main_pane.workspace
# .main_pane.signals.interior.cs
# blk_mem_gen_v1_1 collision detected at time: 768020000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# No errors or warnings.
# Break at vgatest.tfw line 74
# Simulation Breakpoint: Break at vgatest.tfw line 74
# MACRO ./vgatest.fdo PAUSED at line 19
run -continue
# blk_mem_gen_v1_1 collision detected at time: 1767060000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 2535100000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 3303140000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 4071180000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 4839220000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 5607260000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 6375300000, A write address: 4aff, B  read address: 4aff
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for B Read
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 7155940000, A write address: 139, B  read address: 139
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 7923500000, A write address: 12d, B  read address: 12d
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 8691060000, A write address: 121, B  read address: 121
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 9458620000, A write address: 115, B  read address: 115
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 10226180000, A write address: 109, B  read address: 109
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 11001620000, A write address: 1c2, B  read address: 1c2
# Break key hit 
# Break at D:/Xilinx/verilog/src/XilinxCoreLib/BLK_MEM_GEN_V1_1.v line 747
# Simulation Breakpoint: Break at D:/Xilinx/verilog/src/XilinxCoreLib/BLK_MEM_GEN_V1_1.v line 747
# MACRO ./vgatest.fdo PAUSED at line 19
run -continue
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 11769660000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 12537700000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 13305740000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 14073780000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 14841820000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 15609860000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 16377900000, A write address: 1c2, B  read address: 1c2
# Break key hit 
# Break at vs_hs.v line 36
# Simulation Breakpoint: Break at vs_hs.v line 36
# MACRO ./vgatest.fdo PAUSED at line 19
run -continue
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 17145940000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 17913980000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 18682020000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 19450060000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 20218100000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 20986140000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 21754180000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 22522220000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 23290260000, A write address: 1c2, B  read address: 1c2
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 27896140000, A write address: 187, B  read address: 187
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 28664180000, A write address: 187, B  read address: 187
# blk_mem_gen_v1_1 WARNING: Address 4b00 is outside range for A Write
# blk_mem_gen_v1_1 collision detected at time: 29432220000, A write address: 187, B  read address: 187
# Break key hit 
# Break at D:/Xilinx/verilog/src/XilinxCoreLib/blk_mem_gen_v1_1.v line 598
# Simulation Breakpoint: Break at D:/Xilinx/verilog/src/XilinxCoreLib/blk_mem_gen_v1_1.v line 598
# MACRO ./vgatest.fdo PAUSED at line 19