alu.vho

实现16种运算的alu,包括+,-,+1,-1,与或非以及移位比较运算。经调试成功。

SIGNAL Mux_a3113_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3113_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3114_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3114_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3115_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3115_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a7_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a7_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3107_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3107_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3109_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3109_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3173_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3173_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3174_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3174_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3110_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3110_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a6_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a6_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Z_a155_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Z_a155_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3125_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3125_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3126_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3126_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3127_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3127_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a9_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a9_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3122_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3122_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3117_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3117_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3119_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3119_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3120_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3120_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3121_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3121_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a8_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a8_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3129_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3129_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3131_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3131_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3171_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3171_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3172_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3172_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3132_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3132_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a10_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a10_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3135_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3135_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3136_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3136_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3137_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3137_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a11_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a11_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Z_a156_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Z_a156_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL add_a1671_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL add_a1671_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3075_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3075_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3076_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3076_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3178_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3178_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a0_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a0_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3084_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3084_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3087_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3087_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3175_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3175_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3176_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3176_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3088_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3088_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a2_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a2_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3091_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3091_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3092_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3092_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3093_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3093_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a3_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a3_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3080_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3080_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3081_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3081_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3082_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3082_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a1_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a1_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Z_a154_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Z_a154_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3139_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3139_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3141_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3141_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3142_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3142_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3143_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3143_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3144_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3144_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a12_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a12_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3151_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3151_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3153_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3153_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3169_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3169_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3170_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3170_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3154_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3154_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a14_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a14_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3161_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3161_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3162_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3162_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3158_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3158_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3159_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3159_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3157_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3157_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3160_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3160_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3156_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3156_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a15_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a15_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3147_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3147_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3148_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3148_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Mux_a3149_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Mux_a3149_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL result_t_a13_a_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL result_t_a13_a_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Z_a157_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Z_a157_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Z_a158_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Z_a158_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL z1_tmp_a28_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL z1_tmp_a28_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL z1_tmp_aI_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL z1_tmp_aI_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL Z_areg0_I_modesel : std_logic_vector(12 DOWNTO 0);
SIGNAL Z_areg0_I_pathsel : std_logic_vector(10 DOWNTO 0);
SIGNAL C_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL Z_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a0_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a1_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a2_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a3_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a4_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a5_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a6_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a7_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a8_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a9_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a10_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a11_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a12_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a13_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a14_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL result_a15_a_aI_modesel : std_logic_vector(26 DOWNTO 0);
SIGNAL clk_acombout : std_logic;
SIGNAL OP_a3_a_acombout : std_logic;
SIGNAL OP_a2_a_acombout : std_logic;
SIGNAL reduce_or_a11 : std_logic;
SIGNAL OP_a1_a_acombout : std_logic;
SIGNAL dinput_a12_a_acombout : std_logic;
SIGNAL OP_a0_a_acombout : std_logic;
SIGNAL write_acombout : std_logic;
SIGNAL reset_acombout : std_logic;
SIGNAL sel_acombout : std_logic;
SIGNAL B_a0_a_a109 : std_logic;
SIGNAL B_a12_a : std_logic;
SIGNAL A_a0_a_a134 : std_logic;
SIGNAL A_a12_a : std_logic;
SIGNAL dinput_a7_a_acombout : std_logic;
SIGNAL B_a7_a : std_logic;
SIGNAL A_a7_a : std_logic;
SIGNAL dinput_a2_a_acombout : std_logic;
SIGNAL B_a2_a : std_logic;
SIGNAL A_a2_a : std_logic;
SIGNAL dinput_a1_a_acombout : std_logic;
SIGNAL B_a1_a : std_logic;
SIGNAL A_a1_a : std_logic;
SIGNAL dinput_a0_a_acombout : std_logic;
SIGNAL B_a0_a : std_logic;
SIGNAL add_a1666 : std_logic;
SIGNAL add_a1672 : std_logic;
SIGNAL add_a1677 : std_logic;
SIGNAL add_a1924 : std_logic;
SIGNAL add_a1678 : std_logic;
SIGNAL Mux_a3077 : std_logic;
SIGNAL A_a0_a : std_logic;
SIGNAL add_a1668 : std_logic;
SIGNAL add_a1668COUT1_1941 : std_logic;
SIGNAL add_a1685 : std_logic;
SIGNAL add_a1685COUT1_1942 : std_logic;
SIGNAL add_a1710 : std_logic;
SIGNAL dinput_a6_a_acombout : std_logic;
SIGNAL B_a6_a : std_logic;
SIGNAL A_a6_a : std_logic;
SIGNAL dinput_a5_a_acombout : std_logic;
SIGNAL B_a5_a : std_logic;
SIGNAL A_a5_a : std_logic;
SIGNAL dinput_a4_a_acombout : std_logic;
SIGNAL B_a4_a : std_logic;
SIGNAL A_a4_a : std_logic;
SIGNAL dinput_a3_a_acombout : std_logic;
SIGNAL B_a3_a : std_logic;
SIGNAL A_a3_a : std_logic;
SIGNAL add_a1715 : std_logic;
SIGNAL add_a1715COUT1_1943 : std_logic;
SIGNAL add_a1740 : std_logic;
SIGNAL add_a1740COUT1_1944 : std_logic;
SIGNAL add_a1745 : std_logic;
SIGNAL add_a1745COUT1_1945 : std_logic;
SIGNAL add_a1770 : std_logic;
SIGNAL add_a1770COUT1_1946 : std_logic;
SIGNAL add_a1775 : std_logic;
SIGNAL dinput_a11_a_acombout : std_logic;
SIGNAL B_a11_a : std_logic;
SIGNAL A_a11_a : std_logic;
SIGNAL dinput_a10_a_acombout : std_logic;
SIGNAL B_a10_a : std_logic;
SIGNAL A_a10_a : std_logic;
SIGNAL dinput_a9_a_acombout : std_logic;
SIGNAL B_a9_a : std_logic;
SIGNAL A_a9_a : std_logic;
SIGNAL dinput_a8_a_acombout : std_logic;
SIGNAL B_a8_a : std_logic;
SIGNAL A_a8_a : std_logic;
SIGNAL add_a1800 : std_logic;
SIGNAL add_a1800COUT1_1947 : std_logic;
SIGNAL add_a1805 : std_logic;
SIGNAL add_a1805COUT1_1948 : std_logic;
SIGNAL add_a1830 : std_logic;
SIGNAL add_a1830COUT1_1949 : std_logic;
SIGNAL add_a1835 : std_logic;
SIGNAL add_a1835COUT1_1950 : std_logic;
SIGNAL add_a1860 : std_logic;
SIGNAL dinput_a15_a_acombout : std_logic;
SIGNAL A_a15_a : std_logic;
SIGNAL B_a15_a : std_logic;
SIGNAL dinput_a14_a_acombout : std_logic;
SIGNAL B_a14_a : std_logic;
SIGNAL A_a14_a : std_logic;
SIGNAL dinput_a13_a_acombout : std_logic;
SIGNAL B_a13_a : std_logic;
SIGNAL A_a13_a : std_logic;
SIGNAL add_a1865 : std_logic;
SIGNAL add_a1865COUT1_1951 : std_logic;
SIGNAL add_a1890 : std_logic;
SIGNAL add_a1890COUT1_1952 : std_logic;
SIGNAL add_a1900 : std_logic;
SIGNAL add_a1900COUT1_1953 : std_logic;
SIGNAL add_a1908 : std_logic;
SIGNAL Mux_a3165 : std_logic;
SIGNAL add_a1936 : std_logic;
SIGNAL add_a1931 : std_logic;
SIGNAL add_a1926 : std_logic;
SIGNAL add_a1925 : std_logic;
SIGNAL add_a1680 : std_logic;
SIGNAL add_a1680COUT1_1967 : std_logic;
SIGNAL add_a1695 : std_logic;
SIGNAL add_a1695COUT1_1968 : std_logic;
SIGNAL add_a1705 : std_logic;
SIGNAL add_a1930 : std_logic;
SIGNAL add_a1929 : std_logic;
SIGNAL add_a1928 : std_logic;
SIGNAL add_a1927 : std_logic;
SIGNAL add_a1725 : std_logic;
SIGNAL add_a1725COUT1_1969 : std_logic;
SIGNAL add_a1735 : std_logic;
SIGNAL add_a1735COUT1_1970 : std_logic;
SIGNAL add_a1755 : std_logic;
SIGNAL add_a1755COUT1_1971 : std_logic;
SIGNAL add_a1765 : std_logic;
SIGNAL add_a1765COUT1_1972 : std_logic;
SIGNAL add_a1785 : std_logic;
SIGNAL add_a1935 : std_logic;
SIGNAL add_a1934 : std_logic;
SIGNAL add_a1933 : std_logic;
SIGNAL add_a1932 : std_logic;
SIGNAL add_a1795 : std_logic;
SIGNAL add_a1795COUT1_1973 : std_logic;
SIGNAL add_a1815 : std_logic;
SIGNAL add_a1815COUT1_1974 : std_logic;
SIGNAL add_a1825 : std_logic;
SIGNAL add_a1825COUT1_1975 : std_logic;
SIGNAL add_a1845 : std_logic;
SIGNAL add_a1845COUT1_1976 : std_logic;
SIGNAL add_a1855 : std_logic;
SIGNAL add_a1939 : std_logic;
SIGNAL add_a1938 : std_logic;
SIGNAL add_a1937 : std_logic;
SIGNAL add_a1875 : std_logic;
SIGNAL add_a1875COUT1_1977 : std_logic;