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📄 alu.vho

📁 实现16种运算的alu,包括+,-,+1,-1,与或非以及移位比较运算。经调试成功。
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	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_dinput(4),
	combout => dinput_a4_a_acombout);

B_a4_a_aI : cyclone_lcell
-- Equation(s):
-- add_a1928 = !OP_a0_a_acombout & (B[4])
-- B_a4_a = DFFEAS(add_a1928, GLOBAL(clk_acombout), VCC, , B_a0_a_a109, dinput_a4_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "5050",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => OP_a0_a_acombout,
	datac => dinput_a4_a_acombout,
	aclr => GND,
	sload => VCC,
	ena => B_a0_a_a109,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1928,
	regout => B_a4_a);

A_a4_a_aI : cyclone_lcell
-- Equation(s):
-- Mux_a3096 = OP_a2_a_acombout & !B_a4_a & (A[4] # !OP_a0_a_acombout)
-- A_a4_a = DFFEAS(Mux_a3096, GLOBAL(clk_acombout), VCC, , A_a0_a_a134, dinput_a4_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "00C4",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => OP_a0_a_acombout,
	datab => OP_a2_a_acombout,
	datac => dinput_a4_a_acombout,
	datad => B_a4_a,
	aclr => GND,
	sload => VCC,
	ena => A_a0_a_a134,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => Mux_a3096,
	regout => A_a4_a);

dinput_a3_a_aI : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_dinput(3),
	combout => dinput_a3_a_acombout);

B_a3_a_aI : cyclone_lcell
-- Equation(s):
-- add_a1927 = B[3] & !OP_a0_a_acombout
-- B_a3_a = DFFEAS(add_a1927, GLOBAL(clk_acombout), VCC, , B_a0_a_a109, dinput_a3_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "00F0",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datac => dinput_a3_a_acombout,
	datad => OP_a0_a_acombout,
	aclr => GND,
	sload => VCC,
	ena => B_a0_a_a109,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1927,
	regout => B_a3_a);

A_a3_a_aI : cyclone_lcell
-- Equation(s):
-- Mux_a3090 = B_a3_a & (A[3] & (!OP_a1_a_acombout) # !A[3] & OP_a0_a_acombout) # !B_a3_a & (OP_a0_a_acombout & (A[3]) # !OP_a0_a_acombout & OP_a1_a_acombout)
-- A_a3_a = DFFEAS(Mux_a3090, GLOBAL(clk_acombout), VCC, , A_a0_a_a134, dinput_a3_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "3AE4",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => OP_a0_a_acombout,
	datab => OP_a1_a_acombout,
	datac => dinput_a3_a_acombout,
	datad => B_a3_a,
	aclr => GND,
	sload => VCC,
	ena => A_a0_a_a134,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => Mux_a3090,
	regout => A_a3_a);

add_a1713_I : cyclone_lcell
-- Equation(s):
-- add_a1713 = B_a3_a $ A_a3_a $ !add_a1710
-- add_a1715 = CARRY(B_a3_a & (!add_a1710 # !A_a3_a) # !B_a3_a & !A_a3_a & !add_a1710)
-- add_a1715COUT1_1943 = CARRY(B_a3_a & (!add_a1710 # !A_a3_a) # !B_a3_a & !A_a3_a & !add_a1710)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "692B",
	cin_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => B_a3_a,
	datab => A_a3_a,
	cin => add_a1710,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1713,
	cout0 => add_a1715,
	cout1 => add_a1715COUT1_1943);

add_a1738_I : cyclone_lcell
-- Equation(s):
-- add_a1738 = B_a4_a $ A_a4_a $ (!add_a1710 & add_a1715) # (add_a1710 & add_a1715COUT1_1943)
-- add_a1740 = CARRY(B_a4_a & A_a4_a & !add_a1715 # !B_a4_a & (A_a4_a # !add_a1715))
-- add_a1740COUT1_1944 = CARRY(B_a4_a & A_a4_a & !add_a1715COUT1_1943 # !B_a4_a & (A_a4_a # !add_a1715COUT1_1943))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "964D",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => B_a4_a,
	datab => A_a4_a,
	cin => add_a1710,
	cin0 => add_a1715,
	cin1 => add_a1715COUT1_1943,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1738,
	cout0 => add_a1740,
	cout1 => add_a1740COUT1_1944);

add_a1743_I : cyclone_lcell
-- Equation(s):
-- add_a1743 = A_a5_a $ B_a5_a $ !(!add_a1710 & add_a1740) # (add_a1710 & add_a1740COUT1_1944)
-- add_a1745 = CARRY(A_a5_a & B_a5_a & !add_a1740 # !A_a5_a & (B_a5_a # !add_a1740))
-- add_a1745COUT1_1945 = CARRY(A_a5_a & B_a5_a & !add_a1740COUT1_1944 # !A_a5_a & (B_a5_a # !add_a1740COUT1_1944))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "694D",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => A_a5_a,
	datab => B_a5_a,
	cin => add_a1710,
	cin0 => add_a1740,
	cin1 => add_a1740COUT1_1944,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1743,
	cout0 => add_a1745,
	cout1 => add_a1745COUT1_1945);

add_a1768_I : cyclone_lcell
-- Equation(s):
-- add_a1768 = A_a6_a $ B_a6_a $ (!add_a1710 & add_a1745) # (add_a1710 & add_a1745COUT1_1945)
-- add_a1770 = CARRY(A_a6_a & (!add_a1745 # !B_a6_a) # !A_a6_a & !B_a6_a & !add_a1745)
-- add_a1770COUT1_1946 = CARRY(A_a6_a & (!add_a1745COUT1_1945 # !B_a6_a) # !A_a6_a & !B_a6_a & !add_a1745COUT1_1945)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "962B",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => A_a6_a,
	datab => B_a6_a,
	cin => add_a1710,
	cin0 => add_a1745,
	cin1 => add_a1745COUT1_1945,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1768,
	cout0 => add_a1770,
	cout1 => add_a1770COUT1_1946);

add_a1773_I : cyclone_lcell
-- Equation(s):
-- add_a1773 = A_a7_a $ B_a7_a $ !(!add_a1710 & add_a1770) # (add_a1710 & add_a1770COUT1_1946)
-- add_a1775 = CARRY(A_a7_a & B_a7_a & !add_a1770COUT1_1946 # !A_a7_a & (B_a7_a # !add_a1770COUT1_1946))

-- pragma translate_off
GENERIC MAP (
	operation_mode => "arithmetic",
	synch_mode => "off",
	register_cascade_mode => "off",
	sum_lutc_input => "cin",
	lut_mask => "694D",
	cin_used => "true",
	cin0_used => "true",
	cin1_used => "true",
	output_mode => "comb_only")
-- pragma translate_on
PORT MAP (
	dataa => A_a7_a,
	datab => B_a7_a,
	cin => add_a1710,
	cin0 => add_a1770,
	cin1 => add_a1770COUT1_1946,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1773,
	cout => add_a1775);

dinput_a11_a_aI : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_dinput(11),
	combout => dinput_a11_a_acombout);

B_a11_a_aI : cyclone_lcell
-- Equation(s):
-- add_a1935 = B[11] & !OP_a0_a_acombout
-- B_a11_a = DFFEAS(add_a1935, GLOBAL(clk_acombout), VCC, , B_a0_a_a109, dinput_a11_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "00F0",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datac => dinput_a11_a_acombout,
	datad => OP_a0_a_acombout,
	aclr => GND,
	sload => VCC,
	ena => B_a0_a_a109,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1935,
	regout => B_a11_a);

A_a11_a_aI : cyclone_lcell
-- Equation(s):
-- Mux_a3134 = B_a11_a & (A[11] & (!OP_a1_a_acombout) # !A[11] & OP_a0_a_acombout) # !B_a11_a & (OP_a0_a_acombout & A[11] # !OP_a0_a_acombout & (OP_a1_a_acombout))
-- A_a11_a = DFFEAS(Mux_a3134, GLOBAL(clk_acombout), VCC, , A_a0_a_a134, dinput_a11_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "59E8",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => B_a11_a,
	datab => OP_a0_a_acombout,
	datac => dinput_a11_a_acombout,
	datad => OP_a1_a_acombout,
	aclr => GND,
	sload => VCC,
	ena => A_a0_a_a134,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => Mux_a3134,
	regout => A_a11_a);

dinput_a10_a_aI : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_dinput(10),
	combout => dinput_a10_a_acombout);

B_a10_a_aI : cyclone_lcell
-- Equation(s):
-- add_a1934 = B[10] & !OP_a0_a_acombout
-- B_a10_a = DFFEAS(add_a1934, GLOBAL(clk_acombout), VCC, , B_a0_a_a109, dinput_a10_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "00F0",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	datac => dinput_a10_a_acombout,
	datad => OP_a0_a_acombout,
	aclr => GND,
	sload => VCC,
	ena => B_a0_a_a109,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => add_a1934,
	regout => B_a10_a);

A_a10_a_aI : cyclone_lcell
-- Equation(s):
-- Mux_a3130 = OP_a2_a_acombout & !B_a10_a & (A[10] # !OP_a0_a_acombout)
-- A_a10_a = DFFEAS(Mux_a3130, GLOBAL(clk_acombout), VCC, , A_a0_a_a134, dinput_a10_a_acombout, , , VCC)

-- pragma translate_off
GENERIC MAP (
	operation_mode => "normal",
	synch_mode => "on",
	register_cascade_mode => "off",
	sum_lutc_input => "qfbk",
	lut_mask => "00A2",
	output_mode => "reg_and_comb")
-- pragma translate_on
PORT MAP (
	clk => clk_acombout,
	dataa => OP_a2_a_acombout,
	datab => OP_a0_a_acombout,
	datac => dinput_a10_a_acombout,
	datad => B_a10_a,
	aclr => GND,
	sload => VCC,
	ena => A_a0_a_a134,
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	combout => Mux_a3130,
	regout => A_a10_a);

dinput_a9_a_aI : cyclone_io
-- pragma translate_off
GENERIC MAP (
	operation_mode => "input",
	input_register_mode => "none",
	output_register_mode => "none",
	oe_register_mode => "none",
	input_async_reset => "none",
	output_async_reset => "none",
	oe_async_reset => "none",
	input_sync_reset => "none",
	output_sync_reset => "none",
	oe_sync_reset => "none",
	input_power_up => "low",
	output_power_up => "low",
	oe_power_up => "low")
-- pragma translate_on
PORT MAP (
	devclrn => ww_devclrn,
	devpor => ww_devpor,
	devoe => ww_devoe,
	oe => GND,
	padio => ww_dinput(9),
	combout => dinput_a9_a_acombout);

B_a9_a_aI : cyclone_lcell
-- Equation(s):
-- add_a1933 = B[9] & !OP_a0_a_acombout
-- B_a9_a = DFFEAS(add_a1933, GLOBAL(clk_acombout), VCC, , B_a0_a_a109, dinput_a9_a_acombout, , , VCC)
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