📄 small.map.rpt
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; |sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst| ; 51 (3) ; 45 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst ;
; |lpm_counter:\adv_point_3_and_more:advance_pointer_counter| ; 6 (0) ; 3 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter ;
; |cntr_c58:auto_generated| ; 6 (6) ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:\adv_point_3_and_more:advance_pointer_counter|cntr_c58:auto_generated ;
; |lpm_counter:read_pointer_counter| ; 12 (0) ; 12 (0) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter ;
; |cntr_dv7:auto_generated| ; 12 (12) ; 12 (12) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_counter:read_pointer_counter|cntr_dv7:auto_generated ;
; |lpm_shiftreg:info_data_shift_out| ; 25 (25) ; 25 (25) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out ;
; |lpm_shiftreg:ram_data_shift_out| ; 5 (5) ; 5 (5) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:ram_data_shift_out ;
; |sld_rom_sr:crc_rom_sr| ; 13 (13) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr ;
; |small_2C35:inst| ; 555 (0) ; 306 (0) ; 17408 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst ;
; |cpu:the_cpu| ; 528 (528) ; 292 (291) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|cpu:the_cpu ;
; |cpu_rf_module:cpu_rf| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf ;
; |altsyncram:the_altsyncram| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram ;
; |altsyncram_vuo1:auto_generated| ; 0 (0) ; 0 (0) ; 1024 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated ;
; |cpu_test_bench:the_cpu_test_bench| ; 0 (0) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|cpu:the_cpu|cpu_test_bench:the_cpu_test_bench ;
; |cpu_data_master_arbitrator:the_cpu_data_master| ; 2 (2) ; 1 (1) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|cpu_data_master_arbitrator:the_cpu_data_master ;
; |led_pio:the_led_pio| ; 4 (4) ; 8 (8) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|led_pio:the_led_pio ;
; |onchip_ram:the_onchip_ram| ; 1 (1) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|onchip_ram:the_onchip_ram ;
; |altsyncram:the_altsyncram| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|onchip_ram:the_onchip_ram|altsyncram:the_altsyncram ;
; |altsyncram_fh01:auto_generated| ; 0 (0) ; 0 (0) ; 16384 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|onchip_ram:the_onchip_ram|altsyncram:the_altsyncram|altsyncram_fh01:auto_generated ;
; |onchip_ram_s1_arbitrator:the_onchip_ram_s1| ; 20 (20) ; 3 (3) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1 ;
; |small_2C35_reset_clk_domain_synch_module:small_2C35_reset_clk_domain_synch| ; 0 (0) ; 2 (2) ; 0 ; 0 ; 0 ; 0 ; 0 ; 0 ; |small|small_2C35:inst|small_2C35_reset_clk_domain_synch_module:small_2C35_reset_clk_domain_synch ;
+---------------------------------------------------------------------------------------------------+-------------------+--------------+-------------+--------------+---------+-----------+------+--------------+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
Note: For table entries with two numbers listed, the numbers in parentheses indicate the number of resources of the given type used by the specific entity alone. The numbers listed outside of parentheses indicate the total resources of the given type used by the specific entity and all of its sub-entities in the hierarchy.
+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Analysis & Synthesis RAM Summary ;
+--------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+----------------+
; Name ; Type ; Mode ; Port A Depth ; Port A Width ; Port B Depth ; Port B Width ; Size ; MIF ;
+--------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+----------------+
; sld_signaltap:auto_signaltap_0|altsyncram:\stp_non_zero_ram_gen:stp_buffer_ram|altsyncram_jm92:auto_generated|ALTSYNCRAM ; AUTO ; Simple Dual Port ; 4096 ; 5 ; 4096 ; 5 ; 20480 ; None ;
; small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|ALTSYNCRAM ; AUTO ; True Dual Port ; 32 ; 32 ; 32 ; 32 ; 1024 ; rf_ram.mif ;
; small_2C35:inst|onchip_ram:the_onchip_ram|altsyncram:the_altsyncram|altsyncram_fh01:auto_generated|ALTSYNCRAM ; M4K ; Single Port ; 512 ; 32 ; -- ; -- ; 16384 ; onchip_ram.hex ;
+--------------------------------------------------------------------------------------------------------------------------+------+------------------+--------------+--------------+--------------+--------------+-------+----------------+
+--------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Registers Protected by SYN_PRESERVE, DONT_TOUCH ;
+-------------------------------------------------------------------------------------------------------+---------------------------+--------------------------------------------+
; Register Name ; Protected by SYN_PRESERVE ; Not to be Touched by Netlist Optimizations ;
+-------------------------------------------------------------------------------------------------------+---------------------------+--------------------------------------------+
; small_2C35:inst|small_2C35_reset_clk_domain_synch_module:small_2C35_reset_clk_domain_synch|data_out ; yes ; yes ;
; small_2C35:inst|small_2C35_reset_clk_domain_synch_module:small_2C35_reset_clk_domain_synch|data_in_d1 ; yes ; yes ;
+-------------------------------------------------------------------------------------------------------+---------------------------+--------------------------------------------+
+------------------------------------------------------+
; General Register Statistics ;
+----------------------------------------------+-------+
; Statistic ; Value ;
+----------------------------------------------+-------+
; Total registers ; 573 ;
; Number of registers using Synchronous Clear ; 43 ;
; Number of registers using Synchronous Load ; 124 ;
; Number of registers using Asynchronous Clear ; 504 ;
; Number of registers using Asynchronous Load ; 0 ;
; Number of registers using Clock Enable ; 234 ;
; Number of registers using Preset ; 0 ;
+----------------------------------------------+-------+
+------------------------------------------------------------------------------------------------------+
; Inverted Register Statistics ⌨️ 快捷键说明
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