small.tan.rpt.htm

38译码器的设计

<TD ALIGN="LEFT">168.52 MHz ( period = 5.934 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|R_ctrl_st</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_valid</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.711 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">168.55 MHz ( period = 5.933 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[20]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.724 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">168.69 MHz ( period = 5.928 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[12]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.712 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">168.72 MHz ( period = 5.927 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[12]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.711 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">168.78 MHz ( period = 5.925 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[4]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.694 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.06 MHz ( period = 5.915 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[13]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[18]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.684 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.09 MHz ( period = 5.914 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[0]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[13]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.680 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.09 MHz ( period = 5.914 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|D_iw[5]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|R_dst_regnum[2]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.712 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.15 MHz ( period = 5.912 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|D_iw[5]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|R_dst_regnum[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.710 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.15 MHz ( period = 5.912 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[8]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.703 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.18 MHz ( period = 5.911 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[5]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.680 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.18 MHz ( period = 5.911 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[13]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[24]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.714 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.46 MHz ( period = 5.901 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|D_iw[4]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|R_dst_regnum[1]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.692 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.52 MHz ( period = 5.899 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[11]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.683 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.66 MHz ( period = 5.894 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|D_iw[4]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|R_dst_regnum[3]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.685 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.66 MHz ( period = 5.894 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|D_iw[2]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_alu_sub</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.682 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.84 MHz ( period = 5.888 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[30]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_cmp_result</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.676 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.92 MHz ( period = 5.885 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[12]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.669 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">169.95 MHz ( period = 5.884 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[12]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.668 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.01 MHz ( period = 5.882 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|D_iw[12]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|R_wr_dst_reg</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.649 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.01 MHz ( period = 5.882 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[4]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.651 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.33 MHz ( period = 5.871 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[13]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[21]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.667 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.42 MHz ( period = 5.868 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[5]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.637 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.44 MHz ( period = 5.867 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[2]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[6]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.653 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.56 MHz ( period = 5.863 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[17]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.654 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.59 MHz ( period = 5.862 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[13]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[13]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.650 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.82 MHz ( period = 5.854 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[0]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.623 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">170.85 MHz ( period = 5.853 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[13]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[29]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.627 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">171.03 MHz ( period = 5.847 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[1]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.616 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">171.06 MHz ( period = 5.846 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src2[16]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[22]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.642 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">171.23 MHz ( period = 5.840 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[0]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[25]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.588 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">171.29 MHz ( period = 5.838 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[2]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[14]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.607 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">171.38 MHz ( period = 5.835 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[10]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[28]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">None</TD>
<TD ALIGN="LEFT">5.595 ns</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">N/A</TD>
<TD ALIGN="LEFT">171.41 MHz ( period = 5.834 ns )</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|E_src1[16]</TD>
<TD ALIGN="LEFT">small_2C35:inst|cpu:the_cpu|W_alu_result[26]</TD>
<TD ALIGN="LEFT">osc_clk[0]</TD