small.map.eqn.htm

38译码器的设计

<P> --K1L3 is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|cpu_data_master_qualified_request_onchip_ram_s1~103
<P><A NAME="K1L3">K1L3</A> = <A HREF="#K1L2">K1L2</A> & !<A HREF="#D1_W_alu_result[14]">D1_W_alu_result[14]</A>;


<P> --K1L1 is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|add~426
<P><A NAME="K1L1">K1L1</A> = <A HREF="#D1_internal_i_read">D1_internal_i_read</A> & (!<A HREF="#K1L3">K1L3</A>) # !<A HREF="#D1_internal_i_read">D1_internal_i_read</A> & (<A HREF="#K1_cpu_instruction_master_read_data_valid_onchip_ram_s1">K1_cpu_instruction_master_read_data_valid_onchip_ram_s1</A> & (!<A HREF="#K1L3">K1L3</A>) # !<A HREF="#K1_cpu_instruction_master_read_data_valid_onchip_ram_s1">K1_cpu_instruction_master_read_data_valid_onchip_ram_s1</A> & !<A HREF="#K1_onchip_ram_s1_arb_addend[1]">K1_onchip_ram_s1_arb_addend[1]</A> & <A HREF="#K1L3">K1L3</A>);


<P> --E1L2 is small_2C35:inst|cpu_data_master_arbitrator:the_cpu_data_master|A_WE_StdLogicVector~36
<P><A NAME="E1L2">E1L2</A> = !<A HREF="#E1L1">E1L1</A> & (<A HREF="#D1_W_alu_result[14]">D1_W_alu_result[14]</A> # !<A HREF="#K1L1">K1L1</A> & <A HREF="#K1L2">K1L2</A>);


<P> --D1L405 is small_2C35:inst|cpu:the_cpu|E_logic_result[9]~4758
<P><A NAME="D1L405">D1L405</A> = AMPP_FUNCTION(<A HREF="#D1_R_logic_op[1]">D1_R_logic_op[1]</A>, <A HREF="#D1_E_src2[9]">D1_E_src2[9]</A>, <A HREF="#D1_E_src1[9]">D1_E_src1[9]</A>, <A HREF="#D1_R_logic_op[0]">D1_R_logic_op[0]</A>);


<P> --D1L277 is small_2C35:inst|cpu:the_cpu|F_pc[7]~33
<P><A NAME="D1L277">D1L277</A> = AMPP_FUNCTION(<A HREF="#D1L85">D1L85</A>, <A HREF="#D1L23">D1L23</A>, <A HREF="#D1_E_alu_sub">D1_E_alu_sub</A>);


<P> --D1L939 is small_2C35:inst|cpu:the_cpu|W_alu_result[9]~83
<P><A NAME="D1L939">D1L939</A> = AMPP_FUNCTION(<A HREF="#D1L405">D1L405</A>, <A HREF="#D1L277">D1L277</A>, <A HREF="#D1_R_ctrl_dst_data_sel_logic_result">D1_R_ctrl_dst_data_sel_logic_result</A>);


<P> --D1_E_shift_rot_result[9] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[9]
<P><A NAME="D1_E_shift_rot_result[9]">D1_E_shift_rot_result[9]</A> = AMPP_FUNCTION(<A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1L295">D1L295</A>, <A HREF="#D1_E_src1[9]">D1_E_src1[9]</A>, <A HREF="#C1_data_out">C1_data_out</A>, <A HREF="#D1_E_new_inst">D1_E_new_inst</A>);


<P> --D1L305 is small_2C35:inst|cpu:the_cpu|E_logic_result[8]~4759
<P><A NAME="D1L305">D1L305</A> = AMPP_FUNCTION(<A HREF="#D1_R_logic_op[1]">D1_R_logic_op[1]</A>, <A HREF="#D1_E_src2[8]">D1_E_src2[8]</A>, <A HREF="#D1_E_src1[8]">D1_E_src1[8]</A>, <A HREF="#D1_R_logic_op[0]">D1_R_logic_op[0]</A>);


<P> --D1L967 is small_2C35:inst|cpu:the_cpu|F_pc[6]~32
<P><A NAME="D1L967">D1L967</A> = AMPP_FUNCTION(<A HREF="#D1L65">D1L65</A>, <A HREF="#D1L03">D1L03</A>, <A HREF="#D1_E_alu_sub">D1_E_alu_sub</A>);


<P> --D1L639 is small_2C35:inst|cpu:the_cpu|W_alu_result[8]~84
<P><A NAME="D1L639">D1L639</A> = AMPP_FUNCTION(<A HREF="#D1L305">D1L305</A>, <A HREF="#D1L967">D1L967</A>, <A HREF="#D1_R_ctrl_dst_data_sel_logic_result">D1_R_ctrl_dst_data_sel_logic_result</A>);


<P> --D1_E_shift_rot_result[8] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[8]
<P><A NAME="D1_E_shift_rot_result[8]">D1_E_shift_rot_result[8]</A> = AMPP_FUNCTION(<A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1L195">D1L195</A>, <A HREF="#D1_E_src1[8]">D1_E_src1[8]</A>, <A HREF="#C1_data_out">C1_data_out</A>, <A HREF="#D1_E_new_inst">D1_E_new_inst</A>);


<P> --D1L205 is small_2C35:inst|cpu:the_cpu|E_logic_result[7]~4760
<P><A NAME="D1L205">D1L205</A> = AMPP_FUNCTION(<A HREF="#D1_R_logic_op[1]">D1_R_logic_op[1]</A>, <A HREF="#D1_E_src2[7]">D1_E_src2[7]</A>, <A HREF="#D1_E_src1[7]">D1_E_src1[7]</A>, <A HREF="#D1_R_logic_op[0]">D1_R_logic_op[0]</A>);


<P> --D1L667 is small_2C35:inst|cpu:the_cpu|F_pc[5]~31
<P><A NAME="D1L667">D1L667</A> = AMPP_FUNCTION(<A HREF="#D1L45">D1L45</A>, <A HREF="#D1L82">D1L82</A>, <A HREF="#D1_E_alu_sub">D1_E_alu_sub</A>);


<P> --D1L339 is small_2C35:inst|cpu:the_cpu|W_alu_result[7]~85
<P><A NAME="D1L339">D1L339</A> = AMPP_FUNCTION(<A HREF="#D1L205">D1L205</A>, <A HREF="#D1L667">D1L667</A>, <A HREF="#D1_R_ctrl_dst_data_sel_logic_result">D1_R_ctrl_dst_data_sel_logic_result</A>);


<P> --D1_E_shift_rot_result[7] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[7]
<P><A NAME="D1_E_shift_rot_result[7]">D1_E_shift_rot_result[7]</A> = AMPP_FUNCTION(<A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1L095">D1L095</A>, <A HREF="#D1_E_src1[7]">D1_E_src1[7]</A>, <A HREF="#C1_data_out">C1_data_out</A>, <A HREF="#D1_E_new_inst">D1_E_new_inst</A>);


<P> --D1L105 is small_2C35:inst|cpu:the_cpu|E_logic_result[6]~4761
<P><A NAME="D1L105">D1L105</A> = AMPP_FUNCTION(<A HREF="#D1_R_logic_op[1]">D1_R_logic_op[1]</A>, <A HREF="#D1_E_src2[6]">D1_E_src2[6]</A>, <A HREF="#D1_E_src1[6]">D1_E_src1[6]</A>, <A HREF="#D1_R_logic_op[0]">D1_R_logic_op[0]</A>);


<P> --D1L367 is small_2C35:inst|cpu:the_cpu|F_pc[4]~30
<P><A NAME="D1L367">D1L367</A> = AMPP_FUNCTION(<A HREF="#D1L25">D1L25</A>, <A HREF="#D1L62">D1L62</A>, <A HREF="#D1_E_alu_sub">D1_E_alu_sub</A>);


<P> --D1L039 is small_2C35:inst|cpu:the_cpu|W_alu_result[6]~86
<P><A NAME="D1L039">D1L039</A> = AMPP_FUNCTION(<A HREF="#D1L105">D1L105</A>, <A HREF="#D1L367">D1L367</A>, <A HREF="#D1_R_ctrl_dst_data_sel_logic_result">D1_R_ctrl_dst_data_sel_logic_result</A>);


<P> --D1_E_shift_rot_result[6] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[6]
<P><A NAME="D1_E_shift_rot_result[6]">D1_E_shift_rot_result[6]</A> = AMPP_FUNCTION(<A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1L985">D1L985</A>, <A HREF="#D1_E_src1[6]">D1_E_src1[6]</A>, <A HREF="#C1_data_out">C1_data_out</A>, <A HREF="#D1_E_new_inst">D1_E_new_inst</A>);


<P> --D1L005 is small_2C35:inst|cpu:the_cpu|E_logic_result[5]~4762
<P><A NAME="D1L005">D1L005</A> = AMPP_FUNCTION(<A HREF="#D1_R_logic_op[1]">D1_R_logic_op[1]</A>, <A HREF="#D1_E_src2[5]">D1_E_src2[5]</A>, <A HREF="#D1_E_src1[5]">D1_E_src1[5]</A>, <A HREF="#D1_R_logic_op[0]">D1_R_logic_op[0]</A>);


<P> --D1L184 is small_2C35:inst|cpu:the_cpu|E_arith_result[5]~108
<P><A NAME="D1L184">D1L184</A> = AMPP_FUNCTION(<A HREF="#D1L42">D1L42</A>, <A HREF="#D1L05">D1L05</A>, <A HREF="#D1_E_alu_sub">D1_E_alu_sub</A>);


<P> --D1L729 is small_2C35:inst|cpu:the_cpu|W_alu_result[5]~87
<P><A NAME="D1L729">D1L729</A> = AMPP_FUNCTION(<A HREF="#D1L005">D1L005</A>, <A HREF="#D1L184">D1L184</A>, <A HREF="#D1_R_ctrl_dst_data_sel_logic_result">D1_R_ctrl_dst_data_sel_logic_result</A>);


<P> --D1_E_shift_rot_result[5] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[5]
<P><A NAME="D1_E_shift_rot_result[5]">D1_E_shift_rot_result[5]</A> = AMPP_FUNCTION(<A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1L885">D1L885</A>, <A HREF="#D1_E_src1[5]">D1_E_src1[5]</A>, <A HREF="#C1_data_out">C1_data_out</A>, <A HREF="#D1_E_new_inst">D1_E_new_inst</A>);


<P> --D1L994 is small_2C35:inst|cpu:the_cpu|E_logic_result[4]~4763
<P><A NAME="D1L994">D1L994</A> = AMPP_FUNCTION(<A HREF="#D1_R_logic_op[1]">D1_R_logic_op[1]</A>, <A HREF="#D1_E_src2[4]">D1_E_src2[4]</A>, <A HREF="#D1_E_src1[4]">D1_E_src1[4]</A>, <A HREF="#D1_R_logic_op[0]">D1_R_logic_op[0]</A>);


<P> --D1L957 is small_2C35:inst|cpu:the_cpu|F_pc[2]~29
<P><A NAME="D1L957">D1L957</A> = AMPP_FUNCTION(<A HREF="#D1L84">D1L84</A>, <A HREF="#D1L22">D1L22</A>, <A HREF="#D1_E_alu_sub">D1_E_alu_sub</A>);


<P> --D1L429 is small_2C35:inst|cpu:the_cpu|W_alu_result[4]~88
<P><A NAME="D1L429">D1L429</A> = AMPP_FUNCTION(<A HREF="#D1L994">D1L994</A>, <A HREF="#D1L957">D1L957</A>, <A HREF="#D1_R_ctrl_dst_data_sel_logic_result">D1_R_ctrl_dst_data_sel_logic_result</A>);


<P> --D1_E_shift_rot_result[4] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[4]
<P><A NAME="D1_E_shift_rot_result[4]">D1_E_shift_rot_result[4]</A> = AMPP_FUNCTION(<A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1L785">D1L785</A>, <A HREF="#D1_E_src1[4]">D1_E_src1[4]</A>, <A HREF="#C1_data_out">C1_data_out</A>, <A HREF="#D1_E_new_inst">D1_E_new_inst</A>);


<P> --P1_q_a[6] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[6]
<P> --RAM Block Operation Mode: True Dual-Port
<P> --Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
<P> --Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
<P> --Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
<P><A NAME="P1_q_a[6]">P1_q_a[6]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[6]">D1_W_alu_result[6]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[6]">D1_av_ld_byte0_data[6]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);

<P> --P1_q_b[6] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[6]
<P><A NAME="P1_q_b[6]">P1_q_b[6]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[6]">D1_W_alu_result[6]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[6]">D1_av_ld_byte0_data[6]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);


<P> --P1_q_a[5] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[5]
<P> --RAM Block Operation Mode: True Dual-Port
<P> --Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
<P> --Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
<P> --Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
<P><A NAME="P1_q_a[5]">P1_q_a[5]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[5]">D1_W_alu_result[5]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[5]">D1_av_ld_byte0_data[5]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);

<P> --P1_q_b[5] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[5]
<P><A NAME="P1_q_b[5]">P1_q_b[5]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[5]">D1_W_alu_result[5]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[5]">D1_av_ld_byte0_data[5]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);


<P> --P1_q_a[4] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[4]
<P> --RAM Block Operation Mode: True Dual-Port
<P> --Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
<P> --Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
<P> --Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
<P><A NAME="P1_q_a[4]">P1_q_a[4]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[4]">D1_W_alu_result[4]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[4]">D1_av_ld_byte0_data[4]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);

<P> --P1_q_b[4] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[4]
<P><A NAME="P1_q_b[4]">P1_q_b[4]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[4]">D1_W_alu_result[4]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[4]">D1_av_ld_byte0_data[4]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);


<P> --P1_q_a[3] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[3]
<P> --RAM Block Operation Mode: True Dual-Port
<P> --Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
<P> --Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
<P> --Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
<P><A NAME="P1_q_a[3]">P1_q_a[3]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[3]">D1_W_alu_result[3]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[3]">D1_av_ld_byte0_data[3]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);

<P> --P1_q_b[3] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[3]
<P><A NAME="P1_q_b[3]">P1_q_b[3]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[3]">D1_W_alu_result[3]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[3]">D1_av_ld_byte0_data[3]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);


<P> --P1_q_a[2] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[2]
<P> --RAM Block Operation Mode: True Dual-Port
<P> --Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
<P> --Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
<P> --Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
<P><A NAME="P1_q_a[2]">P1_q_a[2]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[2]">D1_W_alu_result[2]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[2]">D1_av_ld_byte0_data[2]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);

<P> --P1_q_b[2] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[2]
<P><A NAME="P1_q_b[2]">P1_q_b[2]</A> = AMPP_FUNCTION(<A HREF="#D1_W_rf_wren_a">D1_W_rf_wren_a</A>, <A HREF="#D1_module_input3">D1_module_input3</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#osc_clk[0]">osc_clk[0]</A>, <A HREF="#D1_W_alu_result[2]">D1_W_alu_result[2]</A>, <A HREF="#D1L197">D1L197</A>, <A HREF="#D1L297">D1L297</A>, <A HREF="#D1L397">D1L397</A>, <A HREF="#D1L497">D1L497</A>, <A HREF="#D1L597">D1L597</A>, <A HREF="#D1_av_ld_byte0_data[2]">D1_av_ld_byte0_data[2]</A>, <A HREF="#D1_D_iw[22]">D1_D_iw[22]</A>, <A HREF="#D1_D_iw[23]">D1_D_iw[23]</A>, <A HREF="#D1_D_iw[24]">D1_D_iw[24]</A>, <A HREF="#D1_D_iw[25]">D1_D_iw[25]</A>, <A HREF="#D1_D_iw[26]">D1_D_iw[26]</A>);


<P> --P1_q_a[1] is small_2C35:inst