small.map.eqn

38译码器的设计

LB1_E_shift_rot_result[3] = AMPP_FUNCTION(osc_clk[0], LB1L585, LB1_E_src1[3], KB1_data_out, LB1_E_new_inst);


--LB1L174 is small_2C35:inst|cpu:the_cpu|E_alu_result~0
LB1L174 = AMPP_FUNCTION(LB1_R_ctrl_dst_data_sel_cmp, LB1_R_ctrl_rdctl_inst);


--LB1L694 is small_2C35:inst|cpu:the_cpu|E_logic_result[2]~4756
LB1L694 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[2], LB1_E_src1[2], LB1_R_logic_op[0]);


--LB1L157 is small_2C35:inst|cpu:the_cpu|F_pc[0]~28
LB1L157 = AMPP_FUNCTION(LB1L44, LB1L81, LB1_E_alu_sub);


--LB1L719 is small_2C35:inst|cpu:the_cpu|W_alu_result[2]~81
LB1L719 = AMPP_FUNCTION(LB1L694, LB1L157, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[2] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[2]
LB1_E_shift_rot_result[2] = AMPP_FUNCTION(osc_clk[0], LB1L485, LB1_E_src1[2], KB1_data_out, LB1_E_new_inst);


--LB1L405 is small_2C35:inst|cpu:the_cpu|E_logic_result[10]~4757
LB1L405 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[10], LB1_E_src1[10], LB1_R_logic_op[0]);


--LB1L377 is small_2C35:inst|cpu:the_cpu|F_pc[8]~34
LB1L377 = AMPP_FUNCTION(LB1L06, LB1L43, LB1_E_alu_sub);


--LB1L149 is small_2C35:inst|cpu:the_cpu|W_alu_result[10]~82
LB1L149 = AMPP_FUNCTION(LB1L405, LB1L377, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[10] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[10]
LB1_E_shift_rot_result[10] = AMPP_FUNCTION(osc_clk[0], LB1L295, LB1_E_src1[10], KB1_data_out, LB1_E_new_inst);


--LB1_internal_d_read is small_2C35:inst|cpu:the_cpu|internal_d_read
LB1_internal_d_read = AMPP_FUNCTION(osc_clk[0], LB1_d_read_nxt, KB1_data_out);


--MB1L1 is small_2C35:inst|cpu_data_master_arbitrator:the_cpu_data_master|A_WE_StdLogicVector~35
MB1L1 = MB1_cpu_data_master_waitrequest # !UB1_d_write & !LB1_internal_d_read;


--LB1_internal_i_read is small_2C35:inst|cpu:the_cpu|internal_i_read
LB1_internal_i_read = AMPP_FUNCTION(osc_clk[0], LB1L087, KB1_data_out);


--SB1_cpu_instruction_master_read_data_valid_onchip_ram_s1 is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|cpu_instruction_master_read_data_valid_onchip_ram_s1
SB1_cpu_instruction_master_read_data_valid_onchip_ram_s1 = DFFEAS(SB1L81, osc_clk[0], !KB1_data_out,  ,  ,  ,  ,  ,  );


--SB1_onchip_ram_s1_arb_addend[1] is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|onchip_ram_s1_arb_addend[1]
SB1_onchip_ram_s1_arb_addend[1] = DFFEAS(SB1L91, osc_clk[0], !KB1_data_out,  ,  ,  ,  ,  ,  );


--SB1_cpu_data_master_read_data_valid_onchip_ram_s1_shift_register is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|cpu_data_master_read_data_valid_onchip_ram_s1_shift_register
SB1_cpu_data_master_read_data_valid_onchip_ram_s1_shift_register = DFFEAS(SB1_registered_cpu_data_master_read_data_valid_onchip_ram_s1, osc_clk[0], !KB1_data_out,  ,  ,  ,  ,  ,  );


--SB1L2 is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|cpu_data_master_qualified_request_onchip_ram_s1~102
SB1L2 = UB1_d_write & !MB1_cpu_data_master_waitrequest & (!SB1_cpu_data_master_read_data_valid_onchip_ram_s1_shift_register # !LB1_internal_d_read) # !UB1_d_write & LB1_internal_d_read & (!SB1_cpu_data_master_read_data_valid_onchip_ram_s1_shift_register);


--SB1L3 is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|cpu_data_master_qualified_request_onchip_ram_s1~103
SB1L3 = SB1L2 & !LB1_W_alu_result[14];


--SB1L1 is small_2C35:inst|onchip_ram_s1_arbitrator:the_onchip_ram_s1|add~426
SB1L1 = LB1_internal_i_read & (!SB1L3) # !LB1_internal_i_read & (SB1_cpu_instruction_master_read_data_valid_onchip_ram_s1 & (!SB1L3) # !SB1_cpu_instruction_master_read_data_valid_onchip_ram_s1 & !SB1_onchip_ram_s1_arb_addend[1] & SB1L3);


--MB1L2 is small_2C35:inst|cpu_data_master_arbitrator:the_cpu_data_master|A_WE_StdLogicVector~36
MB1L2 = !MB1L1 & (LB1_W_alu_result[14] # !SB1L1 & SB1L2);


--LB1L305 is small_2C35:inst|cpu:the_cpu|E_logic_result[9]~4758
LB1L305 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[9], LB1_E_src1[9], LB1_R_logic_op[0]);


--LB1L077 is small_2C35:inst|cpu:the_cpu|F_pc[7]~33
LB1L077 = AMPP_FUNCTION(LB1L85, LB1L23, LB1_E_alu_sub);


--LB1L839 is small_2C35:inst|cpu:the_cpu|W_alu_result[9]~83
LB1L839 = AMPP_FUNCTION(LB1L305, LB1L077, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[9] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[9]
LB1_E_shift_rot_result[9] = AMPP_FUNCTION(osc_clk[0], LB1L195, LB1_E_src1[9], KB1_data_out, LB1_E_new_inst);


--LB1L205 is small_2C35:inst|cpu:the_cpu|E_logic_result[8]~4759
LB1L205 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[8], LB1_E_src1[8], LB1_R_logic_op[0]);


--LB1L767 is small_2C35:inst|cpu:the_cpu|F_pc[6]~32
LB1L767 = AMPP_FUNCTION(LB1L65, LB1L03, LB1_E_alu_sub);


--LB1L539 is small_2C35:inst|cpu:the_cpu|W_alu_result[8]~84
LB1L539 = AMPP_FUNCTION(LB1L205, LB1L767, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[8] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[8]
LB1_E_shift_rot_result[8] = AMPP_FUNCTION(osc_clk[0], LB1L095, LB1_E_src1[8], KB1_data_out, LB1_E_new_inst);


--LB1L105 is small_2C35:inst|cpu:the_cpu|E_logic_result[7]~4760
LB1L105 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[7], LB1_E_src1[7], LB1_R_logic_op[0]);


--LB1L467 is small_2C35:inst|cpu:the_cpu|F_pc[5]~31
LB1L467 = AMPP_FUNCTION(LB1L45, LB1L82, LB1_E_alu_sub);


--LB1L239 is small_2C35:inst|cpu:the_cpu|W_alu_result[7]~85
LB1L239 = AMPP_FUNCTION(LB1L105, LB1L467, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[7] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[7]
LB1_E_shift_rot_result[7] = AMPP_FUNCTION(osc_clk[0], LB1L985, LB1_E_src1[7], KB1_data_out, LB1_E_new_inst);


--LB1L005 is small_2C35:inst|cpu:the_cpu|E_logic_result[6]~4761
LB1L005 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[6], LB1_E_src1[6], LB1_R_logic_op[0]);


--LB1L167 is small_2C35:inst|cpu:the_cpu|F_pc[4]~30
LB1L167 = AMPP_FUNCTION(LB1L25, LB1L62, LB1_E_alu_sub);


--LB1L929 is small_2C35:inst|cpu:the_cpu|W_alu_result[6]~86
LB1L929 = AMPP_FUNCTION(LB1L005, LB1L167, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[6] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[6]
LB1_E_shift_rot_result[6] = AMPP_FUNCTION(osc_clk[0], LB1L885, LB1_E_src1[6], KB1_data_out, LB1_E_new_inst);


--LB1L994 is small_2C35:inst|cpu:the_cpu|E_logic_result[5]~4762
LB1L994 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[5], LB1_E_src1[5], LB1_R_logic_op[0]);


--LB1L184 is small_2C35:inst|cpu:the_cpu|E_arith_result[5]~108
LB1L184 = AMPP_FUNCTION(LB1L42, LB1L05, LB1_E_alu_sub);


--LB1L629 is small_2C35:inst|cpu:the_cpu|W_alu_result[5]~87
LB1L629 = AMPP_FUNCTION(LB1L994, LB1L184, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[5] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[5]
LB1_E_shift_rot_result[5] = AMPP_FUNCTION(osc_clk[0], LB1L785, LB1_E_src1[5], KB1_data_out, LB1_E_new_inst);


--LB1L894 is small_2C35:inst|cpu:the_cpu|E_logic_result[4]~4763
LB1L894 = AMPP_FUNCTION(LB1_R_logic_op[1], LB1_E_src2[4], LB1_E_src1[4], LB1_R_logic_op[0]);


--LB1L757 is small_2C35:inst|cpu:the_cpu|F_pc[2]~29
LB1L757 = AMPP_FUNCTION(LB1L84, LB1L22, LB1_E_alu_sub);


--LB1L329 is small_2C35:inst|cpu:the_cpu|W_alu_result[4]~88
LB1L329 = AMPP_FUNCTION(LB1L894, LB1L757, LB1_R_ctrl_dst_data_sel_logic_result);


--LB1_E_shift_rot_result[4] is small_2C35:inst|cpu:the_cpu|E_shift_rot_result[4]
LB1_E_shift_rot_result[4] = AMPP_FUNCTION(osc_clk[0], LB1L685, LB1_E_src1[4], KB1_data_out, LB1_E_new_inst);


--VB1_q_a[6] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[6]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[6] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[6], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[6], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[6] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[6]
VB1_q_b[6] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[6], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[6], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--VB1_q_a[5] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[5]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[5] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[5], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[5], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[5] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[5]
VB1_q_b[5] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[5], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[5], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--VB1_q_a[4] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[4]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[4] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[4], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[4], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[4] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[4]
VB1_q_b[4] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[4], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[4], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--VB1_q_a[3] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[3]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[3] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[3], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[3], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[3] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[3]
VB1_q_b[3] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[3], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[3], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--VB1_q_a[2] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[2]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[2] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[2], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[2], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[2] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[2]
VB1_q_b[2] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[2], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[2], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--VB1_q_a[1] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[1]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[1] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[1], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[1], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[1] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[1]
VB1_q_b[1] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1_W_alu_result[1], LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[1], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--VB1_q_a[0] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_a[0]
--RAM Block Operation Mode: True Dual-Port
--Port A Depth: 32, Port A Width: 1, Port B Depth: 32, Port B Width: 1
--Port A Logical Depth: 32, Port A Logical Width: 32, Port B Logical Depth: 32, Port B Logical Width: 32
--Port A Input: Registered, Port A Output: Un-registered, Port B Input: Registered, Port B Output: Un-registered
VB1_q_a[0] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1L389, LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[0], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);

--VB1_q_b[0] is small_2C35:inst|cpu:the_cpu|cpu_rf_module:cpu_rf|altsyncram:the_altsyncram|altsyncram_vuo1:auto_generated|q_b[0]
VB1_q_b[0] = AMPP_FUNCTION(LB1_W_rf_wren_a, LB1_module_input3, osc_clk[0], osc_clk[0], LB1L389, LB1L987, LB1L097, LB1L197, LB1L297, LB1L397, LB1_av_ld_byte0_data[0], LB1_D_iw[22], LB1_D_iw[23], LB1_D_iw[24], LB1_D_iw[25], LB1_D_iw[26]);


--XB6_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRSR|Q[0]
XB6_Q[0] = AMPP_FUNCTION(A1L5, G1L72, !G1L2, XB6L4);


--XB4_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA|Q[0]
XB4_Q[0] = AMPP_FUNCTION(A1L5, altera_internal_jtag, !G1L2, G1L42);


--B1_bypass_reg_out is sld_signaltap:auto_signaltap_0|bypass_reg_out
B1_bypass_reg_out = AMPP_FUNCTION(A1L5, altera_internal_jtag, !B1_reset_all, G1L34);


--XB1_Q[5] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[5]
XB1_Q[5] = AMPP_FUNCTION(A1L5, G1L32, !G1L2, G1L62);


--XB1_Q[3] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[3]
XB1_Q[3] = AMPP_FUNCTION(A1L5, G1L12, !G1L2, G1L62);


--XB1_Q[4] is sld_hub:sld_hub_inst|sld_dffex:\GEN_IRF:1:IRF|Q[4]
XB1_Q[4] = AMPP_FUNCTION(A1L5, G1L22, !G1L2, G1L62);


--G1L21 is sld_hub:sld_hub_inst|hub_tdo~442
G1L21 = AMPP_FUNCTION(B1_bypass_reg_out, XB1_Q[5], XB1_Q[3], XB1_Q[4]);


--P3_dffs[0] is sld_signaltap:auto_signaltap_0|sld_ela_control:ela_control|lpm_shiftreg:trigger_config_deserialize|dffs[0]
P3_dffs[0] = AMPP_FUNCTION(A1L5, P3_dffs[1], !B1_reset_all, L1_trigger_setup_ena);


--K1_WORD_SR[0] is sld_signaltap:auto_signaltap_0|sld_rom_sr:crc_rom_sr|WORD_SR[0]
K1_WORD_SR[0] = AMPP_FUNCTION(A1L5, K1L12, !K1_clear_signal, B1L41);


--G1L31 is sld_hub:sld_hub_inst|hub_tdo~443
G1L31 = AMPP_FUNCTION(XB1_Q[5], XB1_Q[3], P3_dffs[0], K1_WORD_SR[0]);


--P1_dffs[0] is sld_signaltap:auto_signaltap_0|sld_offload_buffer_mgr:\stp_non_zero_depth_offload_gen:stp_offload_buff_mgr_inst|lpm_shiftreg:info_data_shift_out|dffs[0]
P1_dffs[0] = AMPP_FUNCTION(A1L5, P1L1, !B1_reset_all);


--G1L41 is sld_hub:sld_hub_inst|hub_tdo~444
G1L41 = AMPP_FUNCTION(XB1_Q[4], P1_dffs[0]);


--G1L51 is sld_hub:sld_hub_inst|hub_tdo~445
G1L51 = AMPP_FUNCTION(XB4_Q[0], G1L21, G1L31, G1L41);


--XB5_Q[0] is sld_hub:sld_hub_inst|sld_dffex:IRF_ENA_0|Q[0]
XB5_Q[0] = AMPP_FUNCTION(A1L5, XB5L3, G1L42);


--K2_WORD_SR[0] is sld_hub:sld_hub_inst|sld_rom_sr:HUB_INFO_REG|WORD_SR[0]
K2_WORD_SR[0] = AMPP_FUNCTION(A1L5, K2L72, K2_WORD_SR[1], !K1_clear_signal, ZB1_state[4], G1L4);


--G1_HUB_BYPASS_REG is sld_hub:sld_hub_inst|HUB_BYPASS_REG
G1_HUB_BYPASS_REG = AMPP_FUNCTION(A1L5, G1L01);


--AC1_dffe1a[0] is sld_hub:sld_hub_inst|lpm_decode:instruction_decoder|decode_rpe:auto_generated|dffe1a[0]
AC1_dffe1a[0] = AMPP_FUNCTION(A1L5, AC1_w_anode1w[3], !G1L2, G1L6);


--G1L61 is sld_hub:sld_hub_inst|hub_tdo~446
G1L61 = AMPP_FUNCTION(XB5_Q[0], K2_WORD_SR[0], G1_HUB_BYPASS_REG, AC1_dffe1a[0]);


--G1_jtag_debug_mode_usr1 is sld_hub:sld_hub_inst|jtag_debug_mode_usr1
G1_jtag_debug_mode_usr1 = AMPP_FUNCTION(A1L5, G1L94, ZB1_state[0], ZB1_state[12]);


--G1L71 is sld_hub:sld_hub_inst|hub_tdo~447
G1L71 = AMPP_FUNCTION(XB6_Q[0], G1L51, G1L61, G1_jtag_debug_mode_usr1);


--ZB1_state[8] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[8]
ZB1_state[8] = AMPP_FUNCTION(A1L5, ZB1L52, !A1L7);


--ZB1_state[3] is sld_hub:sld_hub_inst|sld_jtag_state_machine:jtag_state_machine|state[3]