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<TITLE>Flow report for small</TITLE>
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<H1>Flow report for small</H1>
<H3>Wed Apr 20 20:13:08 2005<BR>
Version 5.0 Build 146 04/13/2005 SJ Full Version</H3>
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<P><HR></P>
<TABLE WIDTH="100%" BORDER="0"><TR VALIGN="TOP">
<TD><H2>Table of Contents</H2></TD>
<TD ALIGN="RIGHT"><A HREF="#top">Top</a></TD></TR></TABLE>
<OL>
<LI><A HREF="#1">Legal Notice</A></LI>
<LI><A HREF="#2">Flow Summary</A></LI>
<LI><A HREF="#3">Flow Settings</A></LI>
<LI><A HREF="#4">Flow Elapsed Time</A></LI>
<LI><A HREF="#5">Flow Log</A></LI>
</OL>
<P><A NAME="1"><HR></A></P>
<TABLE WIDTH="100%" BORDER="0"><TR VALIGN="TOP">
<TD><H2>Legal Notice</H2></TD>
<TD ALIGN="RIGHT"><A HREF="#top">Top</a></TD></TR></TABLE>
<PRE>Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions
and other software and tools, and its AMPP partner logic
functions, and any output files any of the foregoing
(including device programming or simulation files), and any
associated documentation or information are expressly subject
to the terms and conditions of the Altera Program License
Subscription Agreement, Altera MegaCore Function License
Agreement, or other applicable license agreement, including,
without limitation, that your use is for the sole purpose of
programming logic devices manufactured by Altera and sold by
Altera or its authorized distributors. Please refer to the
applicable agreement for further details.
</PRE>
<P><A NAME="2"><HR></A></P>
<TABLE WIDTH="100%" BORDER="0"><TR VALIGN="TOP">
<TD><H2>Flow Summary</H2></TD>
<TD ALIGN="RIGHT"><A HREF="#top">Top</a></TD></TR></TABLE>
<TABLE BORDER="1" cellspacing="1" cellpadding="2">
<TR valign="middle">
<TD ALIGN="LEFT">Flow Status</TH>
<TD ALIGN="LEFT">Successful - Wed Apr 20 20:13:07 2005</TH>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Quartus II Version</TD>
<TD ALIGN="LEFT">5.0 Build 146 04/13/2005 SJ Full Version</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Revision Name</TD>
<TD ALIGN="LEFT">small</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Top-level Entity Name</TD>
<TD ALIGN="LEFT">small</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Family</TD>
<TD ALIGN="LEFT">Cyclone II</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Device</TD>
<TD ALIGN="LEFT">EP2C35F672C6</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Timing Models</TD>
<TD ALIGN="LEFT">Preliminary</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Met timing requirements</TD>
<TD ALIGN="LEFT">Yes</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total logic elements</TD>
<TD ALIGN="LEFT">583 / 33,216 ( 1 % )</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total registers</TD>
<TD ALIGN="LEFT">306</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total pins</TD>
<TD ALIGN="LEFT">10 / 475 ( 2 % )</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total virtual pins</TD>
<TD ALIGN="LEFT">0</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total memory bits</TD>
<TD ALIGN="LEFT">17,408 / 483,840 ( 3 % )</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Embedded Multiplier 9-bit elements</TD>
<TD ALIGN="LEFT">0 / 70 ( 0 % )</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total PLLs</TD>
<TD ALIGN="LEFT">0 / 4 ( 0 % )</TD>
</TR>
</TABLE>
<P><A NAME="3"><HR></A></P>
<TABLE WIDTH="100%" BORDER="0"><TR VALIGN="TOP">
<TD><H2>Flow Settings</H2></TD>
<TD ALIGN="RIGHT"><A HREF="#top">Top</a></TD></TR></TABLE>
<TABLE BORDER="1" cellspacing="1" cellpadding="2">
<TR valign="middle" bgcolor="#C0C0C0">
<TH>Option</TH>
<TH>Setting</TH>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Start date & time</TD>
<TD ALIGN="LEFT">04/20/2005 20:10:59</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Main task</TD>
<TD ALIGN="LEFT">Compilation</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Revision Name</TD>
<TD ALIGN="LEFT">small</TD>
</TR>
</TABLE>
<P><A NAME="4"><HR></A></P>
<TABLE WIDTH="100%" BORDER="0"><TR VALIGN="TOP">
<TD><H2>Flow Elapsed Time</H2></TD>
<TD ALIGN="RIGHT"><A HREF="#top">Top</a></TD></TR></TABLE>
<TABLE BORDER="1" cellspacing="1" cellpadding="2">
<TR valign="middle" bgcolor="#C0C0C0">
<TH>Module Name</TH>
<TH>Elapsed Time</TH>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Analysis & Synthesis</TD>
<TD ALIGN="LEFT">00:00:50</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Fitter</TD>
<TD ALIGN="LEFT">00:00:51</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Assembler</TD>
<TD ALIGN="LEFT">00:00:17</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Timing Analyzer</TD>
<TD ALIGN="LEFT">00:00:03</TD>
</TR>
<TR valign="middle">
<TD ALIGN="LEFT">Total</TD>
<TD ALIGN="LEFT">00:02:01</TD>
</TR>
</TABLE>
<P><A NAME="5"><HR></A></P>
<TABLE WIDTH="100%" BORDER="0"><TR VALIGN="TOP">
<TD><H2>Flow Log</H2></TD>
<TD ALIGN="RIGHT"><A HREF="#top">Top</a></TD></TR></TABLE>
<PRE>quartus_map --read_settings_files=on --write_settings_files=off small -c small
quartus_fit --read_settings_files=off --write_settings_files=off small -c small
quartus_asm --read_settings_files=off --write_settings_files=off small -c small
quartus_tan --read_settings_files=off --write_settings_files=off small -c small --timing_analysis_only
</PRE>
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