clock.bld

16位cpu设计VHDL源码

Release 6.2i - ngdbuild G.28
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.

Command Line: ngdbuild -intstyle ise -dd e:\资料\计算机设计与实践\mycpu16/_ngo
-i -p xcv200-pq240-4 clock.ngc clock.ngd 

Reading NGO file "E:/资料/计算机设计与实践/MyCPU16/clock.ngc" ...
Reading component libraries for design expansion...

Checking timing specifications ...
Checking expanded design ...

NGDBUILD Design Results Summary:
  Number of errors:     0
  Number of warnings:   0

Total memory usage is 39216 kilobytes

Writing NGD file "clock.ngd" ...

Writing NGDBUILD log file "clock.bld"...